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  • I get this error: "glibc detected"

    - by AKGMA
    Hi I just wrote a piece of CPP code and I compiled it using G++ in ubuntu. When I run my code everything is fine, the code runs well and gives output but doesn't exit and it gives this error: *** glibc detected *** ./a.out: free(): invalid next size (fast): 0x09f931f0 *** ======= Backtrace: ========= /lib/libc.so.6(+0x6c501)[0x3de501] /lib/libc.so.6(+0x6dd70)[0x3dfd70] /lib/libc.so.6(cfree+0x6d)[0x3e2e5d] /usr/lib/libstdc++.so.6(_ZdlPv+0x21)[0x6e2441] ./a.out[0x8049ce6] /lib/libc.so.6(+0x2f69e)[0x3a169e] /lib/libc.so.6(+0x2f70f)[0x3a170f] /lib/libc.so.6(__libc_start_main+0xef)[0x388cef] ./a.out[0x8048a61] ======= Memory map: ======== 00219000-0021a000 r-xp 00000000 00:00 0 [vdso] 00354000-00370000 r-xp 00000000 08:01 8781845 /lib/ld-2.12.1.so 00370000-00371000 r--p 0001b000 08:01 8781845 /lib/ld-2.12.1.so 00371000-00372000 rw-p 0001c000 08:01 8781845 /lib/ld-2.12.1.so 00372000-004c9000 r-xp 00000000 08:01 8781869 /lib/libc-2.12.1.so 004c9000-004ca000 ---p 00157000 08:01 8781869 /lib/libc-2.12.1.so 004ca000-004cc000 r--p 00157000 08:01 8781869 /lib/libc-2.12.1.so 004cc000-004cd000 rw-p 00159000 08:01 8781869 /lib/libc-2.12.1.so 004cd000-004d0000 rw-p 00000000 00:00 0 00638000-00717000 r-xp 00000000 08:01 3935829 /usr/lib/libstdc++.so.6.0.14 00717000-0071b000 r--p 000de000 08:01 3935829 /usr/lib/libstdc++.so.6.0.14 0071b000-0071c000 rw-p 000e2000 08:01 3935829 /usr/lib/libstdc++.so.6.0.14 0071c000-00723000 rw-p 00000000 00:00 0 00909000-0092d000 r-xp 00000000 08:01 8781918 /lib/libm-2.12.1.so 0092d000-0092e000 r--p 00023000 08:01 8781918 /lib/libm-2.12.1.so 0092e000-0092f000 rw-p 00024000 08:01 8781918 /lib/libm-2.12.1.so 00fdb000-00ff5000 r-xp 00000000 08:01 8781903 /lib/libgcc_s.so.1 00ff5000-00ff6000 r--p 00019000 08:01 8781903 /lib/libgcc_s.so.1 00ff6000-00ff7000 rw-p 0001a000 08:01 8781903 /lib/libgcc_s.so.1 08048000-0804b000 r-xp 00000000 08:01 8652645 /home/akg/Desktop/contest/a.out 0804b000-0804c000 r--p 00002000 08:01 8652645 /home/akg/Desktop/contest/a.out 0804c000-0804d000 rw-p 00003000 08:01 8652645 /home/akg/Desktop/contest/a.out 09f93000-09fb4000 rw-p 00000000 00:00 0 [heap] b7600000-b7621000 rw-p 00000000 00:00 0 b7621000-b7700000 ---p 00000000 00:00 0 b7765000-b7768000 rw-p 00000000 00:00 0 b7775000-b7779000 rw-p 00000000 00:00 0 bf9a7000-bf9c8000 rw-p 00000000 00:00 0 [stack] Aborted What does this mean? How can i get rid of it? I'm not using malloc or free , I'm just using vector!

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  • Parsing multiple files at a time in Perl

    - by sfactor
    I have a large data set (around 90GB) to work with. There are data files (tab delimited) for each hour of each day and I need to perform operations in the entire data set. For example, get the share of OSes which are given in one of the columns. I tried merging all the files into one huge file and performing the simple count operation but it was simply too huge for the server memory. So, I guess I need to perform the operation each file at a time and then add up in the end. I am new to perl and am especially naive about the performance issues. How do I do such operations in a case like this. As an example two columns of the file are. ID OS 1 Windows 2 Linux 3 Windows 4 Windows Lets do something simple, counting the share of the OSes in the data set. So, each .txt file has millions of these lines and there are many such files. What would be the most efficient way to operate on the entire files.

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  • Initial capacity of collection types, i.e. Dictionary, List

    - by Neil N
    Certain collection types in .Net have an optional "Initial Capacity" constructor param. i.e. Dictionary<string, string> something = new Dictionary<string,string>(20); List<string> anything = new List<string>(50); I can't seem to find what the default initial capacity is for these objects on MSDN. If I know I will only be storing 12 or so items in a dictionary, doesn't it make sense to set the initial capacity to something like 20? My reasoning is, assuming the capacity grows like it does for a StringBuiler, which doubles each time the capacity is hit, and each re-allocation is costly, why not pre-set the size to something you know will hold your data, with some extra room just in case? If the initial capacity is 100, and I know I will only need a dozen or so, it seems as though the rest of that allocated RAM is allocated for nothing. Please spare me the "premature optimization" speil for the O(n^n)th time. I know it won't make my apps any faster or save any meaningful amount of memory, this is mostly out of curiosity.

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  • C++ Storing variables and inheritance

    - by Kaa
    Hello Everyone, Here is my situation: I have an event driven system, where all my handlers are derived from IHandler class, and implement an onEvent(const Event &event) method. Now, Event is a base class for all events and contains only the enumerated event type. All actual events are derived from it, including the EventKey event, which has 2 fields: (uchar) keyCode and (bool)isDown. Here's the interesting part: I generate an EventKey event using the following syntax: Event evt = EventKey(15, true); and I ship it to the handlers: EventDispatch::sendEvent(evt); // void EventDispatch::sendEvent(const Event &event); (EventDispatch contains a linked list of IHandlers and calls their onEvent(const Event &event) method with the parameter containing the sent event. Now the actual question: Say I want my handlers to poll the events in a queue of type Event, how do I do that? x Dynamic pointers with reference counting sound like too big of a solution. x Making copies is more difficult than it sounds, since I'm only receiving a reference to a base type, therefore each time I would need to check the type of event, upcast to EventKey and then make a copy to store in a queue. Sounds like the only solution - but is unpleasant since I would need to know every single type of event and would have to check that for every event received - sounds like a bad plan. x I could allocate the events dynamically and then send around pointers to those events, enqueue them in the array if wanted - but other than having reference counting - how would I be able to keep track of that memory? Do you know any way to implement a very light reference counter that wouldn't interfere with the user? What do you think would be a good solution to this design? I thank everyone in advance for your time. Sincerely, Kaa

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  • Who deletes the copied instance in + operator ? (c++)

    - by Dima
    Hello, I searched how to implement + operator properly all over the internet and all the results i found do the following steps : const MyClass MyClass::operator+(const MyClass &other) const { MyClass result = *this; // Make a copy of myself. Same as MyClass result(*this); result += other; // Use += to add other to the copy. return result; // All done! } I have few questions about this "process" : Isn't that stupid to implement + operator this way, it calls the assignment operator(which copies the class) in the first line and then the copy constructor in the return (which also copies the class , due to the fact that the return is by value, so it destroys the first copy and creates a new one.. which is frankly not really smart ... ) When i write a=b+c, the b+c part creates a new copy of the class, then the 'a=' part copies the copy to himself. who deletes the copy that b+c created ? Is there a better way to implement + operator without coping the class twice, and also without any memory issues ? thanks in advance

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  • Why do I get this strange output behavior?

    - by WilliamKF
    I have the following program test.cc: #include <iostream> unsigned char bogus1[] = { // Changing # of periods (0x2e) changes output after periods. 0x2e, 0x2e, 0x2e, 0x2e }; unsigned int bogus2 = 1816; // Changing this value changes output. int main() { std::clog << bogus1; } I build it with: g++ -g -c -o test.o test.cc; g++ -static-libgcc -o test test.o Using g++ version 3.4.6 I run it through valgrind and nothing is reported wrong. However the output has two extra control characters and looks like this: .... Thats a control-X and a control-G at the end. If you change the value of bogus2 you get different control characters. If you change the number of periods in the array the issue goes away or changes. I suspect it is a memory corruption bug in the compiler or iostream package. What is going on here?

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  • Objective C: Function returning correct data for the first time of call and null for other times

    - by Kooshal Bhungy
    Hi all, Am a beginner in objective C, i am implementing a function that would query a web server and display the returning string in console. I am calling the function (getDatafromServer) repeatedly in a loop. The problem is that the first time am getting the value whereas the other times, it returns me a (null) in console... I've searched about memory management and check out on the forums but none have worked. Can you please guys tell me where am wrong in the codes below? Thanks in advance.... @implementation RequestThread +(void)startthread:(id)param{ while (true) { //NSLog(@"Test threads"); sleep(5); NSLog(@"%@",[self getDatafromServer]); } } +(NSString *) getDatafromServer{ NSAutoreleasePool *pool = [[NSAutoreleasePool alloc] init]; NSString *myRequestString = @"name=Hello%20&[email protected]"; NSData *myRequestData = [NSData dataWithBytes:[myRequestString UTF8String] length:[myRequestString length]]; NSMutableURLRequest *request = [[NSMutableURLRequest alloc] initWithURL: [NSURL URLWithString:@"http://192.168.1.32/gs/includes/widget/getcalls.php?user=asdasd&passw=asdasdasd"]]; [request setHTTPMethod:@"POST"]; [request setHTTPBody: myRequestData]; [request setValue:@"application/x-www-form-urlencoded" forHTTPHeaderField:@"content-type"]; NSData *returnData = [NSURLConnection sendSynchronousRequest:request returningResponse:nil error:nil]; NSString *myString = [NSString stringWithUTF8String:[returnData bytes]]; [myRequestString release]; [request release]; [returnData release]; return myString; [pool release]; } @end

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  • Creating UIButtons

    - by Ralphonzo
    During loadView I am creating 20 UIButtons that I would like to change the title text of depending on the state of a UIPageControl. I have a pre-save plist that is loaded into a NSArray called arrChars on the event of the current page changing, I set the buttons titles to their relevant text title from the array. The code that does this is: for (int i = 1; i < (ButtonsPerPage + 1); i++) { UIButton *uButton = (UIButton *)[self.view viewWithTag:i]; if(iPage == 1) { iArrPos = (i - 1); } else { iArrPos = (iPage * ButtonsPerPage) + (i - 1); } [uButton setAlpha:0]; NSLog(@"Trying: %d of %d", iArrPos, [self.arrChars count]); if (iArrPos >= [self.arrChars count]) { [uButton setTitle: @"" forState: UIControlStateNormal]; } else { NSString *value = [[NSString alloc] initWithFormat:@"%@", [self.arrChars objectAtIndex:iArrPos]]; NSLog(@"%@", value); [uButton setTitle: [[NSString stringWithFormat:@"%@", value] forState: UIControlStateNormal]; [value release]; //////Have tried: //////[uButton setTitle: value forState: UIControlStateNormal]; //////Have also tried: //////[uButton setTitle: [self.arrChars objectAtIndex:iArrPos] forState: UIControlStateNormal]; //////Have also also tried: //////[uButton setTitle: [[self.arrChars objectAtIndex:iArrPos] autorelease] forState: UIControlStateNormal]; } [uButton setAlpha:1]; } When setting the Title of a button it does not appear to be autoreleasing the previous title and the allocation goes up and up. What am I doing wrong? I have been told before that tracking things by allocations is a bad way to chase leaks because as far as I can see, the object is not leaking in Instruments but my total living allocations continue to climb until I get a memory warning. If there is a better way to track there I would love to know.

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  • Visual C++ function suddenly 170 ms slower (4x longer)

    - by Mikael
    For the past few months I've been working on a Visual C++ project to take images from cameras and process them. Up until today this has taken about 65 ms to update the data but now it has suddenly increased significantly. What happens is: I launch my program and for the first 30 or so iterations it performs as expected, then suddenly the loop time increases from 65 ms to 250 ms. The odd thing is, after timing each function I found out that the part of the code which is causing the slowdown is fairly basic and has not been modified in over a month. The data which goes into it is unchanged and identical every iteration but the execution time which is initially less than 1 ms suddenly increases to 170 ms while the rest of the code is still performing as expected (time-wise). Basically, I am calling the same function over and over, for the first 30 calls it performs as it should, after that it slows down for no apparent reason. It might also be worth noting that it is a sudden change in execution time, not a gradual increase. What could be causing this? The code is leaking some memory (~50 kb/s) but not nearly enough to warrant a sudden 4x slowdown. If anyone has any ideas I'd love to hear them!

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  • Allocating 32-bit integer arrays in 64-bit machines

    - by Shredderroy
    I have a 64-bit i7 machine. Suppose I allocate memory for n 32-bit integers. How many physical registers will actually be used in the allocation: n, or n/2? I tried to write the following simple programme to find out. #include <iostream> #include <cstdlib> using namespace std; int main (int argc, char *argv[]) { int a[4]; cout << &a[0] << "\t" << &a[3] << endl; cin.ignore (1); return 0; } // End main () The output is: 0018FA04 0018FA10 They seem further apart than they should be. Why aren't the addresses 04 and 07? And does this mean that the system is actually allocating four (or more) integers, instead of packing the four 32-bit integers into two 64-bit registers? Thanks in advance for your help.

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  • free( ) pointers

    - by user1043625
    I'm required to use a special library to keep track of my memory leaks where malloc()= allocate( ) and free( ) = unallocate( ). I'm trying to complete free a linked-list but it seems like the "root" value isn't being freed. typedef struct _node { struct _node *child; char *command; } Command_list; void delete_commands(Command_list **root) { Command_list *temp; while( *root != NULL ){ temp = (*root)->child; //printf("STRING: %s\n", *root->command ); unallocate( *root ); *root = temp; } } The function that's calling it void file_processing( .... ){ Command_list *root = allocate(sizeof (Command_list)); root = NULL; .... delete_commands( &root ); } } I believe that Command_list *root = allocate(sizeof (Command_list)) isn't being properly de-allocated for some reason. Anyone can give me some hints? UPDATE: I found out that instead of Command_list *root = allocate(sizeof (Command_list)); root = NULL; this works: Command_list *root = NULL;

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  • Visual C++ function suddenly 170x slower

    - by Mikael
    For the past few months I've been working on a Visual C++ project to take images from cameras and process them. Up until today this has taken about 65 ms to update the data but now it has suddenly increased significantly. What happens is: I launch my program and for the first 30 or so iterations it performs as expected, then suddenly the loop time increases from 65 ms to 250 ms. The odd thing is, after timing each function I found out that the part of the code which is causing the slowdown is fairly basic and has not been modified in over a month. The data which goes into it is unchanged and identical every iteration but the execution time which is initially less than 1 ms suddenly increases to 170 ms while the rest of the code is still performing as expected (time-wise). Basically, I am calling the same function over and over, for the first 30 calls it performs as it should, after that it slows down for no apparent reason. It might also be worth noting that it is a sudden change in execution time, not a gradual increase. What could be causing this? The code is leaking some memory (~50 kb/s) but not nearly enough to warrant a sudden 4x slowdown. If anyone has any ideas I'd love to hear them!

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  • Proper way to reassign pointers in c++

    - by user272689
    I want to make sure i have these basic ideas correct before moving on (I am coming from a Java/Python background). I have been searching the net, but haven't found a concrete answer to this question yet. When you reassign a pointer to a new object, do you have to call delete on the old object first to avoid a memory leak? My intuition is telling me yes, but i want a concrete answer before moving on. For example, let say you had a class that stored a pointer to a string class MyClass { private: std::string *str; public: MyClass (const std::string &_str) { str=new std::string(_str); } void ChangeString(const std::string &_str) { // I am wondering if this is correct? delete str; str = new std::string(_str) /* * or could you simply do it like: * str = _str; */ } .... In the ChangeString method, which would be correct? I think i am getting hung up on if you dont use the new keyword for the second way, it will still compile and run like you expected. Does this just overwrite the data that this pointer points to? Or does it do something else? Any advice would be greatly appricated :D

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  • Why did Ubuntu suddenly get so slow?

    - by user101383
    12.10 has been slowing down mysteriously. Normally, in past versions, I can log in, open Firefox, and it will pop up within seconds. 12.10 is like that upon install too, though once I install my old apps, it gets very slow by Ubuntu standards. After login the hard drive will just make noise for a while before the OS will do anything. Hardware: enter description: Desktop Computer product: XPS 8300 () vendor: Dell Inc. serial: B6G2WR1 width: 64 bits capabilities: smbios-2.6 dmi-2.6 vsyscall32 configuration: boot=normal chassis=desktop uuid=44454C4C-3600-1047-8032-C2C04F575231 core description: Motherboard product: 0Y2MRG vendor: Dell Inc. physical id: 0 version: A00 serial: ..CN7360419G04VQ. slot: To Be Filled By O.E.M. *cpu description: CPU product: Intel(R) Core(TM) i7-2600 CPU @ 3.40GHz vendor: Intel Corp. physical id: 4 bus info: cpu@0 version: Intel(R) Core(TM) i7-2600 CPU @ 3.40GHz serial: To Be Filled By O.E.M. slot: CPU 1 size: 1600MHz capacity: 1600MHz width: 64 bits clock: 100MHz capabilities: x86-64 fpu fpu_exception wp vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx rdtscp constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm pcid sse4_1 sse4_2 x2apic popcnt tsc_deadline_timer aes xsave avx lahf_lm ida arat epb xsaveopt pln pts dtherm tpr_shadow vnmi flexpriority ept vpid cpufreq configuration: cores=4 enabledcores=1 threads=2 *-cache:0 description: L1 cache physical id: 5 slot: L1-Cache size: 256KiB capacity: 256KiB capabilities: internal write-through unified *-cache:1 description: L2 cache physical id: 6 slot: L2-Cache size: 1MiB capacity: 1MiB capabilities: internal write-through unified *-cache:2 DISABLED description: L3 cache physical id: 7 slot: L3-Cache size: 8MiB capacity: 8MiB capabilities: internal write-back unified *-memory description: System Memory physical id: 20 slot: System board or motherboard size: 8GiB *-bank:0 description: SODIMM DDR3 Synchronous 1333 MHz (0.8 ns) product: NT2GC64B88B0NF-CG vendor: Nanya physical id: 0 serial: 7228183 slot: DIMM3 size: 2GiB width: 64 bits clock: 1333MHz (0.8ns) *-bank:1 description: SODIMM DDR3 Synchronous 1333 MHz (0.8 ns) product: NT2GC64B88B0NF-CG vendor: Nanya physical id: 1 serial: 1E28183 slot: DIMM1 size: 2GiB width: 64 bits clock: 1333MHz (0.8ns) *-bank:2 description: SODIMM DDR3 Synchronous 1333 MHz (0.8 ns) product: NT2GC64B88B0NF-CG vendor: Nanya physical id: 2 serial: 9E28183 slot: DIMM4 size: 2GiB width: 64 bits clock: 1333MHz (0.8ns) *-bank:3 description: SODIMM DDR3 Synchronous 1333 MHz (0.8 ns) product: NT2GC64B88B0NF-CG vendor: Nanya physical id: 3 serial: 5527183 slot: DIMM2 size: 2GiB width: 64 bits clock: 1333MHz (0.8ns) *-firmware description: BIOS vendor: Dell Inc. physical id: 0 version: A05 date: 09/21/2011 size: 64KiB capacity: 4032KiB capabilities: mca pci upgrade shadowing escd cdboot bootselect socketedrom edd int13floppy1200 int13floppy720 int13floppy2880 int5printscreen int9keyboard int14serial int17printer int10video acpi usb zipboot biosbootspecification *-pci description: Host bridge product: 2nd Generation Core Processor Family DRAM Controller vendor: Intel Corporation physical id: 100 bus info: pci@0000:00:00.0 version: 09 width: 32 bits clock: 33MHz *-pci:0 description: PCI bridge product: Xeon E3-1200/2nd Generation Core Processor Family PCI Express Root Port vendor: Intel Corporation physical id: 1 bus info: pci@0000:00:01.0 version: 09 width: 32 bits clock: 33MHz capabilities: pci pm msi pciexpress normal_decode bus_master cap_list configuration: driver=pcieport resources: irq:40 ioport:e000(size=4096) memory:fe600000-fe6fffff ioport:d0000000(size=268435456) *-display description: VGA compatible controller product: Juniper [Radeon HD 5700 Series] vendor: Advanced Micro Devices [AMD] nee ATI physical id: 0 bus info: pci@0000:01:00.0 version: 00 width: 64 bits clock: 33MHz capabilities: pm pciexpress msi vga_controller bus_master cap_list rom configuration: driver=radeon latency=0 resources: irq:44 memory:d0000000-dfffffff memory:fe620000-fe63ffff ioport:e000(size=256) memory:fe600000-fe61ffff *-multimedia description: Audio device product: Juniper HDMI Audio [Radeon HD 5700 Series] vendor: Advanced Micro Devices [AMD] nee ATI physical id: 0.1 bus info: pci@0000:01:00.1 version: 00 width: 64 bits clock: 33MHz capabilities: pm pciexpress msi bus_master cap_list configuration: driver=snd_hda_intel latency=0 resources: irq:48 memory:fe640000-fe643fff *-communication description: Communication controller product: 6 Series/C200 Series Chipset Family MEI Controller #1 vendor: Intel Corporation physical id: 16 bus info: pci@0000:00:16.0 version: 04 width: 64 bits clock: 33MHz capabilities: pm msi bus_master cap_list configuration: driver=mei latency=0 resources: irq:45 memory:fe708000-fe70800f *-usb:0 description: USB controller product: 6 Series/C200 Series Chipset Family USB Enhanced Host Controller #2 vendor: Intel Corporation physical id: 1a bus info: pci@0000:00:1a.0 version: 05 width: 32 bits clock: 33MHz capabilities: pm debug ehci bus_master cap_list configuration: driver=ehci_hcd latency=0 resources: irq:16 memory:fe707000-fe7073ff *-multimedia description: Audio device product: 6 Series/C200 Series Chipset Family High Definition Audio Controller vendor: Intel Corporation physical id: 1b bus info: pci@0000:00:1b.0 version: 05 width: 64 bits clock: 33MHz capabilities: pm msi pciexpress bus_master cap_list configuration: driver=snd_hda_intel latency=0 resources: irq:46 memory:fe700000-fe703fff *-pci:1 description: PCI bridge product: 6 Series/C200 Series Chipset Family PCI Express Root Port 1 vendor: Intel Corporation physical id: 1c bus info: pci@0000:00:1c.0 version: b5 width: 32 bits clock: 33MHz capabilities: pci pciexpress msi pm normal_decode bus_master cap_list configuration: driver=pcieport resources: irq:41 memory:fe500000-fe5fffff *-network description: Network controller product: BCM4313 802.11b/g/n Wireless LAN Controller vendor: Broadcom Corporation physical id: 0 bus info: pci@0000:02:00.0 version: 01 width: 64 bits clock: 33MHz capabilities: pm msi pciexpress bus_master cap_list configuration: driver=bcma-pci-bridge latency=0 resources: irq:16 memory:fe500000-fe503fff *-pci:2 description: PCI bridge product: 6 Series/C200 Series Chipset Family PCI Express Root Port 4 vendor: Intel Corporation physical id: 1c.3 bus info: pci@0000:00:1c.3 version: b5 width: 32 bits clock: 33MHz capabilities: pci pciexpress msi pm normal_decode bus_master cap_list configuration: driver=pcieport resources: irq:42 memory:fe400000-fe4fffff *-network description: Ethernet interface product: NetLink BCM57788 Gigabit Ethernet PCIe vendor: Broadcom Corporation physical id: 0 bus info: pci@0000:03:00.0 logical name: eth0 version: 01 serial: 18:03:73:e1:a7:71 size: 100Mbit/s capacity: 1Gbit/s width: 64 bits clock: 33MHz capabilities: pm msi pciexpress bus_master cap_list ethernet physical tp mii 10bt 10bt-fd 100bt 100bt-fd 1000bt 1000bt-fd autonegotiation configuration: autonegotiation=on broadcast=yes driver=tg3 driverversion=3.123 duplex=full firmware=sb ip=192.168.1.3 latency=0 link=yes multicast=yes port=MII speed=100Mbit/s resources: irq:47 memory:fe400000-fe40ffff *-usb:1 description: USB controller product: 6 Series/C200 Series Chipset Family USB Enhanced Host Controller #1 vendor: Intel Corporation physical id: 1d bus info: pci@0000:00:1d.0 version: 05 width: 32 bits clock: 33MHz capabilities: pm debug ehci bus_master cap_list configuration: driver=ehci_hcd latency=0 resources: irq:23 memory:fe706000-fe7063ff *-isa description: ISA bridge product: H67 Express Chipset Family LPC Controller vendor: Intel Corporation physical id: 1f bus info: pci@0000:00:1f.0 version: 05 width: 32 bits clock: 33MHz capabilities: isa bus_master cap_list configuration: latency=0 *-storage description: SATA controller product: 6 Series/C200 Series Chipset Family SATA AHCI Controller vendor: Intel Corporation physical id: 1f.2 bus info: pci@0000:00:1f.2 version: 05 width: 32 bits clock: 66MHz capabilities: storage msi pm ahci_1.0 bus_master cap_list configuration: driver=ahci latency=0 resources: irq:43 ioport:f070(size=8) ioport:f060(size=4) ioport:f050(size=8) ioport:f040(size=4) ioport:f020(size=32) memory:fe705000-fe7057ff *-serial UNCLAIMED description: SMBus product: 6 Series/C200 Series Chipset Family SMBus Controller vendor: Intel Corporation physical id: 1f.3 bus info: pci@0000:00:1f.3 version: 05 width: 64 bits clock: 33MHz configuration: latency=0 resources: memory:fe704000-fe7040ff ioport:f000(size=32) *-scsi:0 physical id: 1 logical name: scsi0 capabilities: emulated *-disk description: ATA Disk product: Hitachi HUA72201 vendor: Hitachi physical id: 0.0.0 bus info: scsi@0:0.0.0 logical name: /dev/sda version: JP4O serial: JPW9J0HD21BTZC size: 931GiB (1TB) capabilities: partitioned partitioned:dos configuration: ansiversion=5 sectorsize=512 signature=000641dc *-volume:0 description: EXT4 volume vendor: Linux physical id: 1 bus info: scsi@0:0.0.0,1 logical name: /dev/sda1 logical name: / version: 1.0 serial: 4e3d91b7-fd38-4f44-a9e9-ba3c39b926ec size: 585GiB capacity: 585GiB capabilities: primary journaled extended_attributes large_files huge_files dir_nlink recover extents ext4 ext2 initialized configuration: created=2012-10-21 16:26:50 filesystem=ext4 lastmountpoint=/ modified=2012-10-29 18:12:08 mount.fstype=ext4 mount.options=rw,relatime,errors=remount-ro,data=ordered mounted=2012-10-29 18:12:08 state=mounted *-volume:1 description: Extended partition physical id: 2 bus info: scsi@0:0.0.0,2 logical name: /dev/sda2 size: 7823MiB capacity: 7823MiB capabilities: primary extended partitioned partitioned:extended *-logicalvolume description: Linux swap / Solaris partition physical id: 5 logical name: /dev/sda5 capacity: 7823MiB capabilities: nofs *-volume:2 description: Windows NTFS volume physical id: 3 bus info: scsi@0:0.0.0,3 logical name: /dev/sda3 version: 3.1 serial: 84a92aae-347b-7940-a2d1-f4745b885ef2 size: 337GiB capacity: 337GiB capabilities: primary bootable ntfs initialized configuration: clustersize=4096 created=2012-10-21 18:43:39 filesystem=ntfs modified_by_chkdsk=true mounted_on_nt4=true resize_log_file=true state=dirty upgrade_on_mount=true *-scsi:1 physical id: 2 logical name: scsi1 capabilities: emulated *-cdrom description: DVD-RAM writer product: DVDRWBD DH-12E3S vendor: PLDS physical id: 0.0.0 bus info: scsi@1:0.0.0 logical name: /dev/cdrom logical name: /dev/cdrw logical name: /dev/dvd logical name: /dev/dvdrw logical name: /dev/sr0 version: MD11 capabilities: removable audio cd-r cd-rw dvd dvd-r dvd-ram configuration: ansiversion=5 status=nodisc *-scsi:2 physical id: 3 bus info: usb@2:1.8 logical name: scsi6 capabilities: emulated scsi-host configuration: driver=usb-storage *-disk:0 description: SCSI Disk physical id: 0.0.0 bus info: scsi@6:0.0.0 logical name: /dev/sdb configuration: sectorsize=512 *-disk:1 description: SCSI Disk physical id: 0.0.1 bus info: scsi@6:0.0.1 logical name: /dev/sdc configuration: sectorsize=512 *-disk:2 description: SCSI Disk physical id: 0.0.2 bus info: scsi@6:0.0.2 logical name: /dev/sdd configuration: sectorsize=512 *-disk:3 description: SCSI Disk product: MS/MS-Pro vendor: Generic- physical id: 0.0.3 bus info: scsi@6:0.0.3 logical name: /dev/sde version: 1.03 serial: 3 capabilities: removable configuration: sectorsize=512 *-medium physical id: 0 logical name: /dev/sde

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  • How can I tell the size of my app during development?

    - by Newbyman
    My programming decissions are directly related to how much room I have left, or worse perhaps how much I need to shave off in order to get up the 10mb limit. I have read that Apple has quietly increased the 3G & Edge download limit from 10mb up to 20mb in preparation for the iPad in April. Either way, my real question is how can I gauge a rough estimate of how large my app will end while I'm still in the development phase? Is the file size of my development folder roughly 1 to 1 ratio? Is the compressed file size of my development a better approximation? My .xcodeproj file is only a couple hundred kB, but the size of my folder is 11.8 MB. I have a .sqlite database, less than 20 small png images and a Settings.Bundle. The rest are unknown Xcode files related to build, build for iphoneOS, simulator etc.... My source code is rather large with around 1000 lines in most of the major controllers, all in all around 48 .h&.m files. But my classes folder inside my development folder is less than 800kb. Digging around inside my Build file, there is lots of iphone simulator files and debugging files which I don't think will contribute to the final product. The Application file states that it is around 2.3 MB. However, this is such a large difference from the 11.8 MB, I have to wonder if this is just another piece of the equation. I have the app on the my device, I'm in the testing phase. Therefore, I though that I would try to see how large the working version was on the device by checking in iTunes, however my development app is visible on the right-hand the application's iphone screen, but no information about the app most importantly its size. I also checked in Organizer, I used the lower portion of the screen-(Applications), found my application and selected the drop down arrow which gave my "Application Data" and a download arrow button to the right to save a file on my desktop, named with the unique AppleID. Inside the folder it had three folders-(documents, library, tmp) the documents had a copy of my .sqlite database, the library a few more files but not anything obvious or of size, and the tmp was empty. All in all the entire folder was only 164kb-which tells me that this is not the right place to find the size either. I understand that the size is considered to be the size of my binary plus all the additional files and images that I have add. Does anyone have a effective way of guaging how large the binary is or the relating the development folder size to what the final App Store application size will end up. I know that questions have been posted with similar aspects, but I could not find any answered post that really described...what files, or how to determine size specifically. I know that this question looks like a book, but I just wanted to be specific in conveying exactly what I'm looking for and the attempts thus far. *Note all files are unzipped and still in regular working Xcode order of a single app with no brought-in builds or referenced projects. I'm sure that this is straight forward, I just don't know where to look?

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  • Testing Mobile Websites with Adobe Shadow

    - by dwahlin
    It’s no surprise that mobile development is all the rage these days. With all of the new mobile devices being released nearly every day the ability for developers to deliver mobile solutions is more important than ever. Nearly every developer or company I’ve talked to recently about mobile development in training classes, at conferences, and on consulting projects says that they need to find a solution to get existing websites into the mobile space. Although there are several different frameworks out there that can be used such as jQuery Mobile, Sencha Touch, jQTouch, and others, how do you test how your site renders on iOS, Android, Blackberry, Windows Phone, and the variety of mobile form factors out there? Although there are different virtual solutions that can be used including Electric Plum for iOS, emulators, browser plugins for resizing the laptop/desktop browser, and more, at some point you need to test on as many physical devices as possible. This can be extremely challenging and quite time consuming though especially when you consider that you have to manually enter URLs into devices and click links on each one to drill-down into sites. Adobe Labs just released a product called Adobe Shadow (thanks to Kurt Sprinzl for letting me know about it) that significantly simplifies testing sites on physical devices, debugging problems you find, and even making live modifications to HTML and CSS content while viewing a site on the device to see how rendering changes. You can view a page in your laptop/desktop browser and have it automatically pushed to all of your devices without actually touching the device (a huge time saver). See a problem with a device? Locate it using the free Chrome extension, pull up inspection tools (based on the Chrome Developer tools) and make live changes through Chrome that appear on the respective device so that it’s easy to identify how problems can be resolved. I’ve been using Adobe Shadow and am very impressed with the amount of time saved and the different features that it offers. In the rest of the post I’ll walk through how to get it installed, get it started, and use it to view and debug pages.   Getting Adobe Shadow Installed The following steps can be used to get Adobe Shadow installed: 1. Download and install Adobe Shadow on your laptop/desktop 2. Install the Adobe Shadow extension for Chrome 3. Install the Adobe Shadow app on all of your devices (you can find it in various app stores) 4. Connect your devices to Wifi. Make sure they’re on the same network that your laptop/desktop machine is on   Getting Adobe Shadow Started Once Adobe Shadow is installed, you’ll need to get it running on your laptop/desktop and on all your mobile devices. The following steps walk through that process: 1. Start the Adobe Shadow application on your laptop/desktop 2. Start the Adobe Shadow app on each of your mobile devices 3. Locate the laptop/desktop name in the list that’s shown on each mobile device: 4. Select the laptop/desktop name and a passcode will be shown: 5. Open the Adobe Shadow Chrome extension on the laptop/desktop and enter the passcode for the given device: Using Adobe Shadow to View and Modify Pages Once Adobe Shadow is up and running on your laptop/desktop and on all of your mobile devices you can navigate to a page in Chrome on the laptop/desktop and it will automatically be pushed out to all connected mobile devices. If you have 5 mobile devices setup they’ll all navigate to the page displayed in Chrome (pretty awesome!). This makes it super easy to see how a given page looks on your iPad, Android device, etc. without having to touch the device itself. If you find a problem with a page on a device you can select the device in the Chrome Adobe Shadow extension on your laptop/desktop and select the remote inspector icon (it’s the < > icon): This will pull up the Adobe Shadow remote debugging window which contains the standard Chrome Developer tool tabs such as Elements, Resources, Network, etc. Click on the Elements tab to see the HTML rendered for the target device and then drill into the respective HTML content, CSS styles, etc. As HTML elements are selected in the Adobe Shadow debugging tool they’ll be highlighted on the device itself just like they would if you were debugging a page directly in Chrome with the developer tools. Here’s an example from my Android device that shows how the page looks on the device as I select different HTML elements on the laptop/desktop: Conclusion I’m really impressed with what I’ve to this point from Adobe Shadow. Controlling pages that display on devices directly from my laptop/desktop is a big time saver and the ability to remotely see changes made through the Chrome Developer Tools (on my laptop/desktop) really pushes the tool over the top. If you’re developing mobile applications it’s definitely something to check out. It’s currently free to download and use. For additional details check out the video below:  

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  • Why lock-free data structures just aren't lock-free enough

    - by Alex.Davies
    Today's post will explore why the current ways to communicate between threads don't scale, and show you a possible way to build scalable parallel programming on top of shared memory. The problem with shared memory Soon, we will have dozens, hundreds and then millions of cores in our computers. It's inevitable, because individual cores just can't get much faster. At some point, that's going to mean that we have to rethink our architecture entirely, as millions of cores can't all access a shared memory space efficiently. But millions of cores are still a long way off, and in the meantime we'll see machines with dozens of cores, struggling with shared memory. Alex's tip: The best way for an application to make use of that increasing parallel power is to use a concurrency model like actors, that deals with synchronisation issues for you. Then, the maintainer of the actors framework can find the most efficient way to coordinate access to shared memory to allow your actors to pass messages to each other efficiently. At the moment, NAct uses the .NET thread pool and a few locks to marshal messages. It works well on dual and quad core machines, but it won't scale to more cores. Every time we use a lock, our core performs an atomic memory operation (eg. CAS) on a cell of memory representing the lock, so it's sure that no other core can possibly have that lock. This is very fast when the lock isn't contended, but we need to notify all the other cores, in case they held the cell of memory in a cache. As the number of cores increases, the total cost of a lock increases linearly. A lot of work has been done on "lock-free" data structures, which avoid locks by using atomic memory operations directly. These give fairly dramatic performance improvements, particularly on systems with a few (2 to 4) cores. The .NET 4 concurrent collections in System.Collections.Concurrent are mostly lock-free. However, lock-free data structures still don't scale indefinitely, because any use of an atomic memory operation still involves every core in the system. A sync-free data structure Some concurrent data structures are possible to write in a completely synchronization-free way, without using any atomic memory operations. One useful example is a single producer, single consumer (SPSC) queue. It's easy to write a sync-free fixed size SPSC queue using a circular buffer*. Slightly trickier is a queue that grows as needed. You can use a linked list to represent the queue, but if you leave the nodes to be garbage collected once you're done with them, the GC will need to involve all the cores in collecting the finished nodes. Instead, I've implemented a proof of concept inspired by this intel article which reuses the nodes by putting them in a second queue to send back to the producer. * In all these cases, you need to use memory barriers correctly, but these are local to a core, so don't have the same scalability problems as atomic memory operations. Performance tests I tried benchmarking my SPSC queue against the .NET ConcurrentQueue, and against a standard Queue protected by locks. In some ways, this isn't a fair comparison, because both of these support multiple producers and multiple consumers, but I'll come to that later. I started on my dual-core laptop, running a simple test that had one thread producing 64 bit integers, and another consuming them, to measure the pure overhead of the queue. So, nothing very interesting here. Both concurrent collections perform better than the lock-based one as expected, but there's not a lot to choose between the ConcurrentQueue and my SPSC queue. I was a little disappointed, but then, the .NET Framework team spent a lot longer optimising it than I did. So I dug out a more powerful machine that Red Gate's DBA tools team had been using for testing. It is a 6 core Intel i7 machine with hyperthreading, adding up to 12 logical cores. Now the results get more interesting. As I increased the number of producer-consumer pairs to 6 (to saturate all 12 logical cores), the locking approach was slow, and got even slower, as you'd expect. What I didn't expect to be so clear was the drop-off in performance of the lock-free ConcurrentQueue. I could see the machine only using about 20% of available CPU cycles when it should have been saturated. My interpretation is that as all the cores used atomic memory operations to safely access the queue, they ended up spending most of the time notifying each other about cache lines that need invalidating. The sync-free approach scaled perfectly, despite still working via shared memory, which after all, should still be a bottleneck. I can't quite believe that the results are so clear, so if you can think of any other effects that might cause them, please comment! Obviously, this benchmark isn't realistic because we're only measuring the overhead of the queue. Any real workload, even on a machine with 12 cores, would dwarf the overhead, and there'd be no point worrying about this effect. But would that be true on a machine with 100 cores? Still to be solved. The trouble is, you can't build many concurrent algorithms using only an SPSC queue to communicate. In particular, I can't see a way to build something as general purpose as actors on top of just SPSC queues. Fundamentally, an actor needs to be able to receive messages from multiple other actors, which seems to need an MPSC queue. I've been thinking about ways to build a sync-free MPSC queue out of multiple SPSC queues and some kind of sign-up mechanism. Hopefully I'll have something to tell you about soon, but leave a comment if you have any ideas.

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  • In 10.10, USB 3.0 PCI Express card recognized by lspci but not lsusb or dmesg. How to fix?

    - by Paul
    Asus N PC, runs 10.10 x86_64 The Asus N comes with 4 usb 2.0 ports, each labelled 2.0 on the case. Attempting to add two usb 3.0 ports to be provided by a generic usb 3.0 pci express card installed in the pci expres slot. The new card says usb 3.0 and has the blue ports. The card is installed into the laptop unpowered, then the laptop is powered on and boots normally. Nothing happens when a USB 3.0 flash drive is inserted into the usb 3.0 port. uname -a Linux drpaulbrewer-N90SV 2.6.35.8 #1 SMP Fri Jan 14 15:54:11 EST 2011 x86_64 GNU/Linux lspci -v 00:00.0 Host bridge: Silicon Integrated Systems [SiS] 671MX Subsystem: ASUSTeK Computer Inc. Device 1b27 Flags: bus master, medium devsel, latency 64 Kernel modules: sis-agp 00:01.0 PCI bridge: Silicon Integrated Systems [SiS] PCI-to-PCI bridge (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0 Bus: primary=00, secondary=01, subordinate=01, sec-latency=0 I/O behind bridge: 0000d000-0000dfff Memory behind bridge: fa000000-fdefffff Prefetchable memory behind bridge: 00000000d0000000-00000000dfffffff Capabilities: [d0] Express Root Port (Slot+), MSI 00 Capabilities: [a0] MSI: Enable+ Count=1/1 Maskable- 64bit- Capabilities: [f4] Power Management version 2 Capabilities: [70] Subsystem: Silicon Integrated Systems [SiS] PCI-to-PCI bridge Kernel driver in use: pcieport 00:02.0 ISA bridge: Silicon Integrated Systems [SiS] SiS968 [MuTIOL Media IO] (rev 01) Flags: bus master, medium devsel, latency 0 00:02.5 IDE interface: Silicon Integrated Systems [SiS] 5513 [IDE] (rev 01) (prog-if 80 [Master]) Subsystem: ASUSTeK Computer Inc. Device 1b27 Flags: bus master, medium devsel, latency 128 I/O ports at 01f0 [size=8] I/O ports at 03f4 [size=1] I/O ports at 0170 [size=8] I/O ports at 0374 [size=1] I/O ports at ffe0 [size=16] Capabilities: [58] Power Management version 2 Kernel driver in use: pata_sis 00:03.0 USB Controller: Silicon Integrated Systems [SiS] USB 1.1 Controller (rev 0f) (prog-if 10 [OHCI]) Subsystem: ASUSTeK Computer Inc. Device 1b27 Flags: bus master, medium devsel, latency 64, IRQ 20 Memory at f9fff000 (32-bit, non-prefetchable) [size=4K] Kernel driver in use: ohci_hcd 00:03.1 USB Controller: Silicon Integrated Systems [SiS] USB 1.1 Controller (rev 0f) (prog-if 10 [OHCI]) Subsystem: ASUSTeK Computer Inc. Device 1b27 Flags: bus master, medium devsel, latency 64, IRQ 21 Memory at f9ffe000 (32-bit, non-prefetchable) [size=4K] Kernel driver in use: ohci_hcd 00:03.3 USB Controller: Silicon Integrated Systems [SiS] USB 2.0 Controller (prog-if 20 [EHCI]) Subsystem: ASUSTeK Computer Inc. Device 1b27 Flags: bus master, medium devsel, latency 64, IRQ 22 Memory at f9ffd000 (32-bit, non-prefetchable) [size=4K] Capabilities: [50] Power Management version 2 Kernel driver in use: ehci_hcd 00:04.0 Ethernet controller: Silicon Integrated Systems [SiS] 191 Gigabit Ethernet Adapter (rev 02) Subsystem: ASUSTeK Computer Inc. Device 11f5 Flags: bus master, medium devsel, latency 0, IRQ 19 Memory at f9ffcc00 (32-bit, non-prefetchable) [size=128] I/O ports at cc00 [size=128] Capabilities: [40] Power Management version 2 Kernel driver in use: sis190 Kernel modules: sis190 00:05.0 IDE interface: Silicon Integrated Systems [SiS] SATA Controller / IDE mode (rev 03) (prog-if 8f [Master SecP SecO PriP PriO]) Subsystem: ASUSTeK Computer Inc. Device 1b27 Flags: bus master, medium devsel, latency 64, IRQ 17 I/O ports at c800 [size=8] I/O ports at c400 [size=4] I/O ports at c000 [size=8] I/O ports at bc00 [size=4] I/O ports at b800 [size=16] I/O ports at b400 [size=128] Capabilities: [58] Power Management version 2 Kernel driver in use: sata_sis Kernel modules: sata_sis 00:06.0 PCI bridge: Silicon Integrated Systems [SiS] PCI-to-PCI bridge (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0 Bus: primary=00, secondary=02, subordinate=02, sec-latency=0 Memory behind bridge: fdf00000-fdffffff Capabilities: [b0] Subsystem: Silicon Integrated Systems [SiS] Device 0004 Capabilities: [c0] MSI: Enable+ Count=1/1 Maskable- 64bit+ Capabilities: [d0] Express Root Port (Slot+), MSI 00 Capabilities: [f4] Power Management version 2 Kernel driver in use: pcieport 00:07.0 PCI bridge: Silicon Integrated Systems [SiS] PCI-to-PCI bridge (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0 Bus: primary=00, secondary=03, subordinate=06, sec-latency=0 I/O behind bridge: 0000e000-0000efff Memory behind bridge: fe000000-febfffff Prefetchable memory behind bridge: 00000000f6000000-00000000f8ffffff Capabilities: [b0] Subsystem: Silicon Integrated Systems [SiS] Device 0004 Capabilities: [c0] MSI: Enable+ Count=1/1 Maskable- 64bit+ Capabilities: [d0] Express Root Port (Slot+), MSI 00 Capabilities: [f4] Power Management version 2 Kernel driver in use: pcieport 00:0f.0 Audio device: Silicon Integrated Systems [SiS] Azalia Audio Controller Subsystem: ASUSTeK Computer Inc. Device 17b3 Flags: bus master, medium devsel, latency 0, IRQ 18 Memory at f9ff4000 (32-bit, non-prefetchable) [size=16K] Capabilities: [50] Power Management version 2 Kernel driver in use: HDA Intel Kernel modules: snd-hda-intel 01:00.0 VGA compatible controller: nVidia Corporation G96 [GeForce GT 130M] (rev a1) (prog-if 00 [VGA controller]) Subsystem: ASUSTeK Computer Inc. Device 2021 Flags: bus master, fast devsel, latency 0, IRQ 16 Memory at fc000000 (32-bit, non-prefetchable) [size=16M] Memory at d0000000 (64-bit, prefetchable) [size=256M] Memory at fa000000 (64-bit, non-prefetchable) [size=32M] I/O ports at dc00 [size=128] [virtual] Expansion ROM at fde80000 [disabled] [size=512K] Capabilities: [60] Power Management version 3 Capabilities: [68] MSI: Enable- Count=1/1 Maskable- 64bit+ Capabilities: [78] Express Endpoint, MSI 00 Capabilities: [b4] Vendor Specific Information: Len=14 <?> Kernel driver in use: nvidia Kernel modules: nvidia-current, nouveau, nvidiafb 02:00.0 Network controller: Atheros Communications Inc. AR928X Wireless Network Adapter (PCI-Express) (rev 01) Subsystem: Device 1a3b:1067 Flags: bus master, fast devsel, latency 0, IRQ 16 Memory at fdff0000 (64-bit, non-prefetchable) [size=64K] Capabilities: [40] Power Management version 2 Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit- Capabilities: [60] Express Legacy Endpoint, MSI 00 Capabilities: [90] MSI-X: Enable- Count=1 Masked- Kernel driver in use: ath9k Kernel modules: ath9k 03:00.0 USB Controller: NEC Corporation uPD720200 USB 3.0 Host Controller (rev 03) (prog-if 30) Flags: bus master, fast devsel, latency 0, IRQ 10 Memory at febfe000 (64-bit, non-prefetchable) [size=8K] Capabilities: [50] Power Management version 3 Capabilities: [70] MSI: Enable- Count=1/8 Maskable- 64bit+ Capabilities: [90] MSI-X: Enable- Count=8 Masked- Capabilities: [a0] Express Endpoint, MSI 00 lsusb Bus 003 Device 002: ID 0b05:1751 ASUSTek Computer, Inc. BT-253 Bluetooth Adapter Bus 003 Device 001: ID 1d6b:0001 Linux Foundation 1.1 root hub Bus 002 Device 001: ID 1d6b:0001 Linux Foundation 1.1 root hub Bus 001 Device 004: ID 0bda:0158 Realtek Semiconductor Corp. USB 2.0 multicard reader Bus 001 Device 002: ID 04f2:b071 Chicony Electronics Co., Ltd 2.0M UVC Webcam / CNF7129 Bus 001 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub dmesg trying to post dmesg exceeded the stackexchange posting limit of 30K... but nothing there is usb 3.0

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  • Question about "ASP.NET 3.5 Social Networking" by Andrew Siemer (from Packt Publishing)

    - by user287745
    am currently reading a book, which has explanation of making a social website. ASP.NET 3.5 Social Networking https://www.packtpub.com/expert-guide-for-social-networking-with-asp-.net-3.5/book On page 41 I noticed that the images of the solution explorer given in the text, indicate that windowsformapplication[PROJECT] has been used instead of WebForms[create new website]. there are no webforms? how would the end result be a site? what is happening here?? the name of the book is, ASP.NET 3.5 Social Networking, please refer to page 41, thanks note:- i have always made websites which needs hosting and be accessible from other computers using webforms[create new website] which has web.config file app_data etc..... please help thank you.

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  • Android multiple email attachment using Intent question

    - by yyyy1234
    Hi, I've been working on Android program to send email with attachment (image file , audio file , etc) using Intent with (ACTION_SEND) . THe program is working when email has a single attachment. I used Intent.putExtra( android.content.Intent.EXTRA_STREAM, uri) to attach the designated image file to the mail and it is wokring fine , the mail can be delivered through Gmail . However, when I tried to have multiple images attached to the same mail by calling Intent.putExtra( android.content.Intent.EXTRA_STREAM, uri) multiple times, it failed to work. None of the attachment show up in the email . I searched the SDK documentation and Android programming user group about email attachment but cannot find any related info. However, I've discovered that there's another intent constnat ACTION_SEND_MULTIPLE (available since API level 4 ) which might meet my requirement. Based on SDK documentation, it simply states that it deliver multiple data to someone else , it works like ACTION_SEND , excpet the data is multiple. But I still could not figure out the correct usage for this command. I tried to delcare intent with ACTION_SEND_MULTIPLE , then call putExtra(EXTRA_STREAM, uri) multiple times to attach multiple images , but I got the same errnoenous result just like before, none of the attachment show up in the email. Has anyone tried with ACTION_SEND_MULTIPLE and got it working with multiple email attachment ? Thanks very much for your help. Regards, yyyy1234

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  • WPF Styles and Tooltips Question

    - by A.R.
    I have a style that I am using to make dynamic tooltips on certain text boxes like so. <Style TargetType="{x:Type TextBox}"> <Setter Property="MinWidth" Value="100"/> <Style.Triggers> <Trigger Property="Validation.HasError" Value="True"> <!-- item of interest --> <Setter Property="ToolTip"> <Setter.Value> <MultiBinding Converter="{StaticResource ErrorMessageConverter}"> <Binding RelativeSource="{RelativeSource Self}" Path="Tag"/> </MultiBinding> </Setter.Value> </Setter> </Trigger> </Style.Triggers> </Style> This works very well, but if I want to use a more complex tooltip I can't figure out how to bind to 'Tag' anymore for the converter value. For example; ... <Setter Property="ToolTip"> <Setter.Value> <StackPanel> <TextBlock> <TextBlock.Text> <MultiBinding Converter="{StaticResource ErrorMessageConverter}"> <!-- item of interest --> <Binding RelativeSource=" what goes here?? "/> </MultiBinding> </TextBlock.Text> </TextBlock> <Image/> </StackPanel> </Setter.Value> </Setter> ... I have tried several flavors of 'FindAncestor' and what not for the relative source, but I can't get anything to work. Any ideas?? UPDATE: 12-29-2010 : Here is the correct code, answer provided by our friend Goblin below. Works perfectly! ... <Setter Property="ToolTip"> <Setter.Value> <!-- Item of interest --> <ToolTip DataContext="{Binding Path=PlacementTarget, RelativeSource={x:Static RelativeSource.Self}}"> <StackPanel> <Image/> <TextBlock> <TextBlock.Text> <MultiBinding Converter="{StaticResource ErrorMessageConverter}"> <Binding Path="Tag"/> </MultiBinding> </TextBlock.Text> </TextBlock> </StackPanel> </ToolTip> </Setter.Value> </Setter> ...

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  • Delphi Indy IDHTTP question

    - by user327175
    I am trying to get the captcha image from a AOL, and i keep getting an error 418. unit imageunit; /// /// h t t p s://new.aol.com/productsweb/ /// interface uses Windows, Messages, SysUtils, Variants, Classes, Graphics, Controls, Forms, Dialogs, StdCtrls, IdIOHandler, IdIOHandlerSocket, IdIOHandlerStack, IdSSL, IdSSLOpenSSL, IdIntercept, IdZLibCompressorBase, IdCompressorZLib, IdCookieManager, IdBaseComponent, IdComponent, IdTCPConnection, IdTCPClient, IdHTTP,jpeg,GIFImg, ExtCtrls; type TForm2 = class(TForm) IdHTTP1: TIdHTTP; IdCookieManager1: TIdCookieManager; IdCompressorZLib1: TIdCompressorZLib; IdConnectionIntercept1: TIdConnectionIntercept; IdSSLIOHandlerSocketOpenSSL1: TIdSSLIOHandlerSocketOpenSSL; Panel1: TPanel; Image1: TImage; Panel2: TPanel; Button1: TButton; Edit1: TEdit; procedure Button1Click(Sender: TObject); private { Private declarations } public { Public declarations } end; var Form2: TForm2; implementation {$R *.dfm} procedure TForm2.Button1Click(Sender: TObject); var JPI : TJPEGImage; streamdata:TMemoryStream; begin streamdata := TMemoryStream.Create; try idhttp1.Get(edit1.Text, Streamdata); Except { Handle exceptions } On E : Exception Do Begin MessageDlg('Exception: '+E.Message,mtError, [mbOK], 0); End; End; //h t t p s://new.aol.com/productsweb/WordVerImage?20890843 //h t t p s://new.aol.com/productsweb/WordVerImage?91868359 /// /// gives error 418 unused /// streamdata.Position := 0; JPI := TJPEGImage.Create; Try JPI.LoadFromStream ( streamdata ); Finally Image1.Picture.Assign ( JPI ); JPI.Free; streamdata.Free; End; end; end. Form: object Form2: TForm2 Left = 0 Top = 0 Caption = 'Form2' ClientHeight = 247 ClientWidth = 480 Color = clBtnFace Font.Charset = DEFAULT_CHARSET Font.Color = clWindowText Font.Height = -11 Font.Name = 'Tahoma' Font.Style = [] OldCreateOrder = False PixelsPerInch = 96 TextHeight = 13 object Panel1: TPanel Left = 0 Top = 41 Width = 480 Height = 206 Align = alClient TabOrder = 0 ExplicitLeft = -8 ExplicitTop = 206 ExplicitHeight = 41 object Image1: TImage Left = 1 Top = 1 Width = 478 Height = 204 Align = alClient ExplicitLeft = 5 ExplicitTop = 17 ExplicitWidth = 200 ExplicitHeight = 70 end end object Panel2: TPanel Left = 0 Top = 0 Width = 480 Height = 41 Align = alTop TabOrder = 1 ExplicitLeft = 40 ExplicitTop = 32 ExplicitWidth = 185 object Button1: TButton Left = 239 Top = 6 Width = 75 Height = 25 Caption = 'Button1' TabOrder = 0 OnClick = Button1Click end object Edit1: TEdit Left = 16 Top = 8 Width = 217 Height = 21 TabOrder = 1 end end object IdHTTP1: TIdHTTP Intercept = IdConnectionIntercept1 IOHandler = IdSSLIOHandlerSocketOpenSSL1 MaxAuthRetries = 100 AllowCookies = True HandleRedirects = True RedirectMaximum = 100 ProxyParams.BasicAuthentication = False ProxyParams.ProxyPort = 0 Request.ContentLength = -1 Request.Accept = 'image/gif, image/jpeg, image/pjpeg, image/pjpeg, application/x-s' + 'hockwave-flash, application/cade, application/xaml+xml, applicat' + 'ion/vnd.ms-xpsdocument, application/x-ms-xbap, application/x-ms-' + 'application, /' Request.BasicAuthentication = False Request.Referer = 'http://www.yahoo.com' Request.UserAgent = 'Mozilla/5.0 (X11; U; Linux i686; en-US; rv:1.9.2.1) Gecko/201001' + '22 firefox/3.6.1' HTTPOptions = [hoForceEncodeParams] CookieManager = IdCookieManager1 Compressor = IdCompressorZLib1 Left = 240 Top = 80 end object IdCookieManager1: TIdCookieManager Left = 360 Top = 136 end object IdCompressorZLib1: TIdCompressorZLib Left = 368 Top = 16 end object IdConnectionIntercept1: TIdConnectionIntercept Left = 304 Top = 72 end object IdSSLIOHandlerSocketOpenSSL1: TIdSSLIOHandlerSocketOpenSSL Intercept = IdConnectionIntercept1 MaxLineAction = maException Port = 0 DefaultPort = 0 SSLOptions.Mode = sslmUnassigned SSLOptions.VerifyMode = [] SSLOptions.VerifyDepth = 0 Left = 192 Top = 136 end end If you go to: h t t p s://new.aol.com/productsweb/ you will notice the captcha image has a url like: h t t p s://new.aol.com/productsweb/WordVerImage?91868359 I put that url in the edit box and get an error. What is wrong with this code.

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  • Android text layout question: two textviews, side-by-side, with different layout alignments and weights

    - by thx1200
    I'm still a bit of an Android noob, forgive me if this is simple and I'm just not seeing it. There are two portions of text in a view that spans the entire width horizontally, but is only as high as one line of text. The left side must always be displayed in full, but should take no more horizontal space than it needs. The right side should be pushed over by the left side and fill up the remainder of the screen width. If the right side text is smaller than this width, the text should be right-aligned horizontally. If the text is greater than the width, it should scroll horizontally. The text on the right side will be updated frequently and should slide up with new text when the app tells it (explaining the TextSwitcher in the layout). I have tried two different layout styles. In both situations, I can get the left side to "push" the layout, the right side to scroll, but I can't figure out how to get the right side to right align. It is always left aligned. Here is a picture showing what is happening... http://img10.imageshack.us/img10/5599/androidlayout.png In addition (but less important), in my layout code I have android:fadingEdge="none" on the TextViews, but it still has a faded edge on the left and right side when it scrolls. Why is that? Here are the two layouts I created, which yield the results shown, but not the results I want. Using a horizontal LinearLayout... <?xml version="1.0" encoding="utf-8"?> <LinearLayout xmlns:android="http://schemas.android.com/apk/res/android" android:id="@+id/LinearLayoutStatusBar" android:orientation="horizontal" android:layout_width="fill_parent" android:layout_height="wrap_content" android:layout_margin="2px" android:background="#555555" > <TextView android:id="@+id/TextViewTimer" android:textSize="18px" android:textColor="#FFFFFF" android:layout_gravity="left" android:layout_weight="0" android:layout_width="wrap_content" android:layout_height="wrap_content" android:layout_marginLeft="0px" android:layout_marginRight="3px" android:text="Left Side" > </TextView> <TextSwitcher android:id="@+id/TextSwitcherDetails" android:inAnimation="@anim/push_up_in" android:outAnimation="@anim/push_up_out" android:layout_weight="1" android:layout_width="wrap_content" android:layout_height="wrap_content" android:layout_gravity="right" android:layout_marginLeft="3px" android:layout_marginRight="0px" > <TextView android:id="@+id/TextViewDetails1" android:textSize="18px" android:layout_width="match_parent" android:layout_height="match_parent" android:layout_gravity="right" android:singleLine="true" android:ellipsize="marquee" android:marqueeRepeatLimit="marquee_forever" android:scrollHorizontally="true" android:focusable="true" android:focusableInTouchMode="true" android:fadingEdge="none" android:text="Right Side 1" > </TextView> <TextView android:id="@+id/TextViewDetails2" android:textSize="18px" android:layout_width="match_parent" android:layout_height="match_parent" android:layout_gravity="right" android:singleLine="true" android:ellipsize="marquee" android:marqueeRepeatLimit="marquee_forever" android:scrollHorizontally="true" android:focusable="true" android:focusableInTouchMode="true" android:fadingEdge="none" android:text="Right Side 2 - This is a really long text this is long and fun and fun and long" > </TextView> </TextSwitcher> </LinearLayout> And the RelativeLayout style... <?xml version="1.0" encoding="utf-8"?> <RelativeLayout xmlns:android="http://schemas.android.com/apk/res/android" android:id="@+id/LinearLayoutStatusBar" android:layout_width="fill_parent" android:layout_height="wrap_content" android:layout_margin="2px" android:background="#555555" > <TextView android:id="@+id/TextViewTimer" android:textSize="18px" android:textColor="#FFFFFF" android:layout_gravity="left" android:layout_weight="0" android:layout_width="wrap_content" android:layout_height="wrap_content" android:layout_marginLeft="0px" android:layout_marginRight="3px" android:layout_alignParentLeft="true" android:text="Left Side" > </TextView> <TextSwitcher android:id="@+id/TextSwitcherDetails" android:inAnimation="@anim/push_up_in" android:outAnimation="@anim/push_up_out" android:layout_weight="1" android:layout_width="wrap_content" android:layout_height="wrap_content" android:layout_marginLeft="3px" android:layout_marginRight="0px" android:layout_toRightOf="@+id/TextViewTimer" android:layout_alignParentRight="true" android:fadingEdge="none" android:fadingEdgeLength="0px" > <TextView android:id="@+id/TextViewDetails1" android:textSize="18px" android:layout_width="fill_parent" android:layout_height="wrap_content" android:layout_gravity="right" android:singleLine="true" android:ellipsize="marquee" android:marqueeRepeatLimit="marquee_forever" android:scrollHorizontally="true" android:focusable="true" android:focusableInTouchMode="true" android:fadingEdge="none" android:fadingEdgeLength="0px" android:text="Right Side 1" > </TextView> <TextView android:id="@+id/TextViewDetails2" android:textSize="18px" android:layout_width="fill_parent" android:layout_height="wrap_content" android:layout_gravity="right" android:singleLine="true" android:ellipsize="marquee" android:marqueeRepeatLimit="marquee_forever" android:scrollHorizontally="true" android:focusable="true" android:focusableInTouchMode="true" android:fadingEdge="none" android:fadingEdgeLength="0px" android:text="Right Side 2 - This is a really long text this is long and fun and fun and long" > </TextView> </TextSwitcher> </RelativeLayout> So how do I get that text on the right side to right-align. Thanks!

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  • "'0.offsetWidth' is null or not an object" - Coda Slider - Javascript Error Question

    - by bgadoci
    I implemented the Coda Slider tutorial successfully that is located here: http://jqueryfordesigners.com/coda-slider-effect/ The slider works great but I am getting a javascript error that I am not sure how to fix. The error says: '0.offsetWidth' is null or not an object coda-slider.js, line 19 character 3 Not sure how to fix it. Anyone have any ideas? Here is my js and css (don't think I need to upload the HTML but let me know if that helps). JS (coda-slider.js) // when the DOM is ready... $(document).ready(function () { var $panels = $('#slider .scrollContainer > div'); var $container = $('#slider .scrollContainer'); // if false, we'll float all the panels left and fix the width // of the container var horizontal = true; // float the panels left if we're going horizontal if (horizontal) { $panels.css({ 'float' : 'left', 'position' : 'relative' // IE fix to ensure overflow is hidden }); // calculate a new width for the container (so it holds all panels) $container.css('width', $panels[0].offsetWidth * $panels.length); <------line 19 } // collect the scroll object, at the same time apply the hidden overflow // to remove the default scrollbars that will appear var $scroll = $('#slider .scroll').css('overflow', 'hidden'); // apply our left + right buttons $scroll .before('<img class="scrollButtons left" src="/images/layout/navigation/scroll_left.png" />') .after('<img class="scrollButtons right" src="/images/layout/navigation/scroll_right.png" />'); // handle nav selection function selectNav() { $(this) .parents('ul:first') .find('a') .removeClass('selected') .end() .end() .addClass('selected'); } $('#slider .navigation').find('a').click(selectNav); // go find the navigation link that has this target and select the nav function trigger(data) { var el = $('#slider .navigation').find('a[href$="' + data.id + '"]').get(0); selectNav.call(el); } if (window.location.hash) { trigger({ id : window.location.hash.substr(1) }); } else { $('ul.navigation a:first').click(); } // offset is used to move to *exactly* the right place, since I'm using // padding on my example, I need to subtract the amount of padding to // the offset. Try removing this to get a good idea of the effect var offset = parseInt((horizontal ? $container.css('paddingTop') : $container.css('paddingLeft')) || 0) * -1; var scrollOptions = { target: $scroll, // the element that has the overflow // can be a selector which will be relative to the target items: $panels, navigation: '.navigation a', // selectors are NOT relative to document, i.e. make sure they're unique prev: 'img.left', next: 'img.right', // allow the scroll effect to run both directions axis: 'xy', onAfter: trigger, // our final callback offset: offset, // duration of the sliding effect duration: 500, // easing - can be used with the easing plugin: // http://gsgd.co.uk/sandbox/jquery/easing/ easing: 'swing' }; // apply serialScroll to the slider - we chose this plugin because it // supports// the indexed next and previous scroll along with hooking // in to our navigation. $('#slider').serialScroll(scrollOptions); // now apply localScroll to hook any other arbitrary links to trigger // the effect $.localScroll(scrollOptions); // finally, if the URL has a hash, move the slider in to position, // setting the duration to 1 because I don't want it to scroll in the // very first page load. We don't always need this, but it ensures // the positioning is absolutely spot on when the pages loads. scrollOptions.duration = 1; $.localScroll.hash(scrollOptions); }); CSS #slider { margin-left: 35px; position: relative; width: 875px; } .scroll { position: relative; width: 875px; height: 268px; overflow: auto; /* fix for IE to respect overflow */ background: #FFFFFF scroll 0; } .scrollContainer div.panel { position: relative; height: 210px; width: 875px; /* change to 560px if not using JS to remove rh.scroll */ } .scrollButtons { position: absolute; top: 115px; cursor: pointer; } .scrollButtons.left { left: -20px; } .scrollButtons.right { right: -20px; }

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  • sharp architecture, FluentNHibernate, automapper, DTO, 1:m persistence question

    - by csetzkorn
    Let us say we have a class A which has a reference to another class B (1:m) public class A { public virtual B B { get; set; } } I reflect this using FluentNHibernate within the sharp architecture and also manage to ‘initialise’ A and its B via a DTO and Automapper. The DTO contain A’s values and B (just B’s id value/A’s foreign key initialised). I was hoping that I can persist A by ‘just’ using its 'out of the box repository' without requiring B’s repository using: SaveOrUpdate(A); (A has been mapped using AutoMapper and contains B with its Id initialised) Was my assumption too naive? Can I achieve this somehow (without ever requiring B’s repository)? Or do I have to use A’s and B’s repository in, for example, the controller or some other service layer? Thanks. Best wishes, Christian

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