JIT-ing on FPGAs ?

Posted by anon on Stack Overflow See other posts from Stack Overflow or by anon
Published on 2010-05-29T02:33:52Z Indexed on 2010/05/29 2:42 UTC
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Many VMS, JVM/LLVM/... have JITs -- as the code is being interpreted, x86 instructions are created on the fly and executed.

If there something similar to this for FPGAS? Is there someway where as an FPGA is running, I reconfigure it? [If so, please provide project / paper links. If not, what is the technology bottleneck that prevents this from happening?]

Thanks!

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