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  • CPUID on Intel i7 processors

    - by StarPacker
    I'm having an issue with my CPUID-based code on newer i7-based machines. It is detecting the CPU as having a single core with 8 HT units instead of 4 cores each with 2 HT units. I must be misinterpreting the results of the CPUID information coming back from the CPU, but I can't see how. Basically, I iterate through each processor visible to Windows, set thread affinity to that thread and then make a sequence of CPUID calls. args = new CPUID_Args(); args.eax = 1; executeHandler(ref args); if (0 != (args.edx & (0x1 << 28))) { //If the 28th bit in EDX is flagged, this processor supports multiple logical processors per physical package // in this case bits 23:16 of EBX should give the count. //** EBX here is 0x2100800 logicalProcessorCount = (args.ebx & 0x00FF0000) >> 16; //** this tells me there are 16 logical processors (wrong) } else { logicalProcessorCount = 1; } apic = unchecked((byte)((0xFF000000 & args.ebx) >> 24)); if (maximumSupportedCPUID >= 4) { args = new CPUID_Args(); args.eax = 4; executeHandler(ref args); //EAX now contains 0x1C004121 coreCount = 1 + ((args.eax & 0xFC000000) >> 26); //This calculates coreCount as 8 } else { coreCount = 1; } This sequence repeats for the remainder of the CPUs in the system. Has anyone faced this before?

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  • Hyper-Threading comments

    - by jchang
    There seems to be significant confusion about Hyper-Threading. Part of the problem is that vendors like to tout every new feature as the greatest invention since the six-pack, and its follow-on the 12-pack. I used to think the 4-pack was a travesty, but now that I am older and can nolonger finish a 12-pack with each meal, suddenly the 4-pack is not such a travesty. But I digress. I do appluad innovation, and I do accept that the first generation is almost never perfect, thats why its the bleeding...(read more)

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  • CPU DB like IMDB for Microprocessors

    - by Jason Fitzpatrick
    If you’re interested in the history of microprocessors, the CPU DB at Stanford is a massive database of microprocessors that covers everything from code names to speed to processor families. Play with their visuals or download the entire database and make your own. CPU DB [Stanford.edu] The Best Free Portable Apps for Your Flash Drive Toolkit How to Own Your Own Website (Even If You Can’t Build One) Pt 3 How to Sync Your Media Across Your Entire House with XBMC

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  • How to benchmark on multi-core processors

    - by Pascal Cuoq
    I am looking for ways to perform micro-benchmarks on multi-core processors. Context: At about the same time desktop processors introduced out-of-order execution that made performance hard to predict, they, perhaps not coincidentally, also introduced special instructions to get very precise timings. Example of these instructions are rdtsc on x86 and rftb on PowerPC. These instructions gave timings that were more precise than could ever be allowed by a system call, allowed programmers to micro-benchmark their hearts out, for better or for worse. On a yet more modern processor with several cores, some of which sleep some of the time, the counters are not synchronized between cores. We are told that rdtsc is no longer safe to use for benchmarking, but I must have been dozing off when we were explained the alternative solutions. Question: Some systems may save and restore the performance counter and provide an API call to read the proper sum. If you know what this call is for any operating system, please let us know in an answer. Some systems may allow to turn off cores, leaving only one running. I know Mac OS X Leopard does when the right Preference Pane is installed from the Developers Tools. Do you think that this make rdtsc safe to use again? More context: Please assume I know what I am doing when trying to do a micro-benchmark. If you are of the opinion that if an optimization's gains cannot be measured by timing the whole application, it's not worth optimizing, I agree with you, but I cannot time the whole application until the alternative data structure is finished, which will take a long time. In fact, if the micro-benchmark were not promising, I could decide to give up on the implementation now; I need figures to provide in a publication whose deadline I have no control over.

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  • How to verify power provided to processors is clean

    - by GregC
    Once in a blue moon, I am seeing a blue screen of death on a shiny new Dell R7610 with a single 1100 Watt Dell-provided power supply on a beefy UPS. BCode is 101 (A clock interrupt was not received...), which some say is caused by under-volting a CPU. Naturally, I would have to contact Dell support, and their natural reaction would be to replace a motherboard, a power supply, or CPU, or a mixture of the above components. In synthetic benchmarks, system memory and CPU, as well as graphics memory and CPU perform admirably, staying up for hours and days. My questions are: Is power supply good enough for the application? Does it provide clean enough power to VRMs on the motherboard? Are VRMs good enough for dual Xeon E5-2665? Does C-states logic work correctly? Is there sufficient current provided to PCIe peripherals, such as disk controllers? P.S. Recently, I've gone through the ordeal with HP. They were nice and professional about it, but root cause was not established, and the HP machine still is less than 100%, giving me a blue screen of death once in a couple of months. Here's what quick web-searching turns up: http://www.sevenforums.com/bsod-help-support/35427-win-7-clock-interrupt-bsod-101-error.html#post356791 It appears Dell has addressed the above issue by clocking PCIe bus down to 5GT/sec in A03 BIOS. My disk controllers support PCIe 3.0, meaning that I would have to re-validate stability. Early testing shows improvements. Further testing shows significant decrease in performance on each of the x16 slots with Dell R7610 with A03 BIOS. But now it's running stable. HP machine has received a microcode update in September 2013 SUM (July BIOS) that makes it stable.

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  • Best Practise for Stopwatch in multi processors machine?

    - by Ahmed Said
    I found a good question for measuring function performance, and the answers recommend to use Stopwatch as follows Stopwatch sw = new Stopwatch(); sw.Start(); //DoWork sw.Stop(); //take sw.Elapsed But is this valid if you are running under multi processors machine? the thread can be switched to another processor, can it? Also the same thing should be in Enviroment.TickCount. If the answer is yes should I wrap my code inside BeginThreadAffinity as follows Thread.BeginThreadAffinity(); Stopwatch sw = new Stopwatch(); sw.Start(); //DoWork sw.Stop(); //take sw.Elapsed Thread.EndThreadAffinity(); P.S The switching can occur over the thread level not only the processor level, for example if the function is running in another thread so the system can switch it to another processor, if that happens, will the Stopwatch be valid after this switching? I am not using Stopwatch for perfromance measurement only but also to simulate timer function using Thread.Sleep (to prevent call overlapping)

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  • Multi-part question about multi-threading, locks and multi-core processors (multi ^ 3)

    - by MusiGenesis
    I have a program with two methods. The first method takes two arrays as parameters, and performs an operation in which values from one array are conditionally written into the other, like so: void Blend(int[] dest, int[] src, int offset) { for (int i = 0; i < src.Length; i++) { int rdr = dest[i + offset]; dest[i + offset] = src[i] > rdr? src[i] : rdr; } } The second method creates two separate sets of int arrays and iterates through them such that each array of one set is Blended with each array from the other set, like so: void CrossBlend() { int[][] set1 = new int[150][75000]; // we'll pretend this actually compiles int[][] set2 = new int[25][10000]; // we'll pretend this actually compiles for (int i1 = 0; i1 < set1.Length; i1++) { for (int i2 = 0; i2 < set2.Length; i2++) { Blend(set1[i1], set2[i2], 0); // or any offset, doesn't matter } } } First question: Since this apporoach is an obvious candidate for parallelization, is it intrinsically thread-safe? It seems like no, since I can conceive a scenario (unlikely, I think) where one thread's changes are lost because a different threads ~simultaneous operation. If no, would this: void Blend(int[] dest, int[] src, int offset) { lock (dest) { for (int i = 0; i < src.Length; i++) { int rdr = dest[i + offset]; dest[i + offset] = src[i] > rdr? src[i] : rdr; } } } be an effective fix? Second question: If so, what would be the likely performance cost of using locks like this? I assume that with something like this, if a thread attempts to lock a destination array that is currently locked by another thread, the first thread would block until the lock was released instead of continuing to process something. Also, how much time does it actually take to acquire a lock? Nanosecond scale, or worse than that? Would this be a major issue in something like this? Third question: How would I best approach this problem in a multi-threaded way that would take advantage of multi-core processors (and this is based on the potentially wrong assumption that a multi-threaded solution would not speed up this operation on a single core processor)? I'm guessing that I would want to have one thread running per core, but I don't know if that's true.

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  • Programming for Multi core Processors

    - by Chathuranga Chandrasekara
    As far as I know, the multi-core architecture in a processor does not effect the program. The actual instruction execution is handled in a lower layer. my question is, Given that you have a multicore environment, Can I use any programming practices to utilize the available resources more effectively? How should I change my code to gain more performance in multicore environments?

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  • What parallel programming model do you recommend today to take advantage of the manycore processors

    - by Doctor J
    If you were writing a new application from scratch today, and wanted it to scale to all the cores you could throw at it tomorrow, what parallel programming model/system/language/library would you choose? Why? I am particularly interested in answers along these axes: Programmer productivity / ease of use (can mortals successfully use it?) Target application domain (what problems is it (not) good at?) Concurrency style (does it support tasks, pipelines, data parallelism, messages...?) Maintainability / future-proofing (will anybody still be using it in 20 years?) Performance (how does it scale on what kinds of hardware?) I am being deliberately vauge on the nature of the application in anticipation of getting good general answers useful for a variety of applications.

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  • What is the difference between a 32-bit and 64-bit processor?

    - by JJG
    I have been trying to read up on 32-bit and 64-bit processors (http://en.wikipedia.org/wiki/32-bit_processing). My understanding is that a 32-bit processor (like x86) has registers 32-bits wide. I'm not sure what that means. So it has special "memory spaces" that can store integer values up to 2^32? I don't want to sound stupid, but I have no idea about processors. I'm assuming 64-bits is, in general, better than 32-bits. Although my computer now (one year old, Win 7, Intel Atom) has a 32-bit processor.

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  • Windows based development for ARM processors

    - by user367231
    I am a complete newbie to the ARM world. I need to be able to write C code, compile it, and then download into an ARM emulator, and execute. I need to use the GCC 4.1.2 compiler for the C code compilation. Can anybody point me in the correct directions for the following issues? What tool chain to use? What emulator to use? Are there tutorials or guides on setting up the tool chain?

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  • Does GetSystemInfo (on Windows) always return the number of logical processors?

    - by mhughes
    Reading up on this, and specifically reading the Microsoft docs, it looks like it should be returning the number of PHYSICAL processors, and that you should use GetLogicalProcessorInformation to figure out how many LOGICAL processors you have. Here's the doc I found on the SYSTEM_INFO structure: http://msdn.microsoft.com/en-us/library/ms724958(v=VS.85).aspx And here's the doc on GetLogicalProcessorInformation: (spaces added to get through spam filter) http:// msdn.microsoft.com/ en-us/ library/ ms683194.aspx Reading up on it further though, in most of the discussions I've found on this topic, developers say to that GetSystemInfo (and the SYSTEM_INFO structure) report the number of LOGICAL processors. When I search again, I find that MS did release some info on this (and a hot fix), here (spaces added to get through spam filter): http:// support. microsoft.com/ kb/936235 Reading that, it sounds like on Xp, pre-service Pack 3, GetSystemInfo reports the number of LOGICAL processors in the SYSTEM_INFO structure. It also reads to me that on Windows Vista and Windows 7, GetSystemInfo should be reporting the number of PHYSICAL processors (different to Windows XP pre-service Pack 3). Does anyone know what it actually does? Does GetSystemInfo really report the number of physical processors (on the same computer) differently, depending on which OS it's running on?

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  • Why does working processors harder use more electrical power?

    - by GazTheDestroyer
    Back in the mists of time when I started coding, at least as far as I'm aware, processors all used a fixed amount of power. There was no such thing as a processor being "idle". These days there are all sorts of technologies for reducing power usage when the processor is not very busy, mostly by dynamically reducing the clock rate. My question is why does running at a lower clock rate use less power? My mental picture of a processor is of a reference voltage (say 5V) representing a binary 1, and 0V representing 0. Therefore I tend to think of of a constant 5V being applied across the entire chip, with the various logic gates disconnecting this voltage when "off", meaning a constant amount of power is being used. The rate at which these gates are turned on and off seems to have no relation to the power used. I have no doubt this is a hopelessly naive picture, but I am no electrical engineer. Can someone explain what's really going on with frequency scaling, and how it saves power. Are there any other ways that a processor uses more or less power depending on state? eg Does it use more power if more gates are open? How are mobile / low power processors different from their desktop cousins? Are they just simpler (less transistors?), or is there some other fundamental design difference?

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  • Is the Intel Core i5 mobile processor better than the Intel Core i7 mobile processor?

    - by Tim Barnaski
    I'm shopping for a new laptop from Dell (going to install Ubuntu on it) and I'm currently trying to sort out which processor I want. Based purely on the clock speed, it would seem that the core i5 is better than the core i7. The Intel® Core™ i5-430M has a 2.26GHz clock speed, while the Intel® Core™ i7-720QM Quad Core Processor only has a 1.6GHz clock speed. Would this not indicate that the i5 is faster than the i7?

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  • Processor with higher FSB than motherboard can support.

    - by Wesley
    Hi all, Please redirect me if there is a similar question, but I have an ECS P4VXASD2+ (V5.0) motherboard, which supports a 533 MHz FSB. I want to put in a Pentium 4 3.2 GHz processor (Socket 478) with an FSB of 800 MHz. Would this be possible? Would the FSB of the processor just be limited to 533 MHz? Thanks in advance.

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