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  • Does anyone do hardware benchmarks on compiling code?

    - by Colen
    I've seen a bunch of sites that benchmark new hardware on gaming performance, zipping some files, encoding a movie, or whatever. Are there any that test the impact of new hardware (like SSDs, new CPUs, RAM speeds, or whatever) on compile and link speeds, either linux or windows? It'd be really good to find out what mattered the most for compile speed and be able to focus on that, instead of just extrapolating from other benchmarks.

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  • How to use uTouch on multitouch-enabled touchpads?

    - by Freddi
    I currently have a Synaptics touchpad with only few classic multitouch features (2 finger scroll, right click). By installing the uTouch testing suite, I saw that it doesn't accept my touchpad as input device. I want to buy a newer notebook and would like to benefit of uTouch features (window management, swipe, pinch, rotate). Does uTouch only work on touchscreens or also on touchpads? What requirements should I take into account when choosing a new notebook?

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  • Are my actual worker threads exceeding the sp_configure 'max worker threads' value?

    Tom Stringer (@SQLife) was working on some HADR testing for a customer to simulate many availability groups and introduce significant load into the system to measure overhead and such. In his quest to do that he was seeing behavior that he couldn’t really explain and so worked with him to uncover what was happening under the covers. Understand Locking, Blocking & Row VersioningRead Kalen Delaney's eBook to understand SQL Server concurrency, and use SQL Monitor to pinpoint excessive blocking and deadlocking. Download free resources.

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  • SlimTune

    - by csharp-source.net
    SlimTune is a free profiler and performance analysis/tuning tool for .NET applications. It provides many powerful features, such as remote profiling, real time results, multiple plugin-based visualizations, and much more. The source code is available under the terms of the MIT License.

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  • Oracle User Productivity Kit Best Practices for Upgrade Projects

    Minimize risk and increase success of your upgrade with Oracle User Productivity Kit. By providing value throughout the upgrade cycle, Oracle UPK can maximize your return on investment and quckly get your users up to speed on the new application. Learn how to use Oracle UPK for all phases of your upgrade project, including process review and design; application setup and configuration; testing, training and change management; and maintenance and support.

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  • DBA Reporting Presentation - Cambridge UG

    - by NeilHambly
    I'm now able to Report (sorry for the pun!) that my presentation on DBA Reporting I gave @ the User group on 25th November @ Red-Gate Offices in Cambridge So I have attached the Presentation in PDF format for you all to replay and view if you weren't able to attend. Here a few links you may also want to check out on some of those products we discussed Various ones like SQL NEXUS / DAIG / PAL / Internals Viewer http://www.codeplex.com/ SQL Server 2005 Performance Dashboard Reports http://www...(read more)

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  • ISV Exastack program: IBIS, Performix, Cardtek

    - by Javier Puerta
    Impact Business Information Solutions (IBIS) accelerates insights for Health Sciences decision-makers to achieve new levels productivity using Oracle’s extreme-performance system, Oracle Exadata Database Machine. Read More. Perfomix Inc Achieves Oracle Exadata Optimized Status. Read more. Cardtek Group Company SmartSoft's payment processing solution achieves Oracle Exadata Optimized status. Read more.

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  • Data Virtualization: Federated and Hybrid

    - by Krishnamoorthy
    Data becomes useful when it can be leveraged at the right time. Not only enterprises application stores operate on large volume, velocity and variety of data. Mobile and social computing are in the need of operating in foresaid data. Replicating and transferring large swaths of data is one challenge faced in the field of data integration. However, smaller chunks of data aggregated from a variety of sources presents and even more interesting challenge in the industry. Over the past few decades, technology trends focused on best user experience, operating systems, high performance computing, high performance web sites, analysis of warehouse data, service oriented architecture, social computing, cloud computing, and big data. Operating on the ‘dark data’ becomes mandatory in the future technology trend, although, no solution can make dark data useful data in a single day. Useful data can be quantified by the facts of contextual, personalized and on time delivery. In most cases, data from a single source may not be complete the picture. Data has to be combined and computed from various sources, where data may be captured as hybrid data, meaning the combination of structured and unstructured data. Since related data is often found across disparate sources, effectively integrating these sources determines how useful this data ultimately becomes. Technology trends in 2013 are expected to focus on big data and private cloud. Consumers are not merely interested in where data is located or how data is retrieved and computed. Consumers are interested in how quick and how the data can be leveraged. In many cases, data virtualization is the right solution, and is expected to play a foundational role for SOA, Cloud integration, and Big Data. The Oracle Data Integration portfolio includes a data virtualization product called ODSI (Oracle Data Service Integrator). Unlike other data virtualization solutions, ODSI can perform both read and write operations on federated/hybrid data (RDBMS, Webservices,  delimited file and XML). The ODSI Engine is built on XQuery, hence ODSI user can perform computations on data either using XQuery or SQL. Built in data and query caching features, which reduces latency in repetitive calls. Rightly positioning ODSI, can results in a highly scalable model, reducing spend on additional hardware infrastructure.

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  • Sybase IQ 15.4 annoncé : Sybase parie sur Hadoop et MapReduce, et défie sa maison mère ?

    Sybase IQ 15.4 annoncé pour fin novembre Sybase veut repousser les limites du Big Data avec Hadoop et MapReduce Alors que la grand messe annuelle de SAP, le SAPPHIRE NOW, battait son plein, la nouvelle filiale de l'éditeur allemand Sybase a annoncé en totale indépendance la sortie de Sybase IQ 15.4, son serveur analytique haute performance structuré en colonnes pour gérer les "big data". Alors que de son côté SAP met en avant HANA, sa nouvelle technologie de mise en cache des données (ou "In-Memory Computing") pour accélérer la vitesse de traite...

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  • Is there going to be Twinview ( or alternative) implemented for nouveau ?

    - by lisak
    as I've had heavy issues with nvidia driver regarding performance of basic X window operations (window moving, resizing, scrolling). I switched to nouveau driver. But I lost the possibility of having dual screen that I had previously thanks to nvidia twinview feature... Anyway I rather have fluent X than dual screen, but having dual screen would be nice, so I'm wondering if there is already an nouveau alternative to nvidia's twinview or if it is going to be implemented.

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  • NetCAT ou le lancement des tests des dernières builds de NetBeans 6.9 : Dernière ligne droite pour l

    NetCAT ou le lancement des tests des dernières build de NetBeans 6.9 Dernière ligne droite pour la nouvelle mouture de NetBeans Depuis le 15 Mars, NetCAT (NetBeans Community Acceptance Testing program), a débuté la série de tests des dernières versions builds de la plateforme NetBeans. Ainsi, une cinquantaine de membres ayant demandé leur intégration au projet vont tester et émettre des retours d'expérience afin d'améliorer le maximum de points dans l'objectif d'obtenir une version finale stable et sans bugs. Le programme va se dérouler pendant 3 mois autour des milestones de l'IDE Voici le planning prévu : [IMG]http://www.livesphere.fr/images/dvp/netc...

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  • Capitalize on Engineering and Information Assets throughout the Enterprise

    To facilitate information exchange, drive performance and improve corporate governance, organizations are investing in Oracle Universal Content Management to store, track and manage their digital information assets. Combined with Oracle's AutoVue visualization solutions and CADTop, Sword Group's CAD integration for UCM, engineering centric organizations can now access, view and collaborate on engineering and CAD documents throughout the enterprise for improved visibility and more informed decision making.

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  • TechEd 2010 Followup

    - by AllenMWhite
    Last week I presented a couple of sessions at Tech Ed NA in New Orleans. It was a great experience, even though my demos didn't always work out as planned. Here are the sessions I presented: DAT01-INT Administrative Demo-Fest for SQL Server 2008 SQL Server 2008 provides a wealth of features aimed at the DBA. In this demofest of features we'll see ways to make administering SQL Server easier and faster such as Centralized Data Management, Performance Data Warehouse, Resource Governor, Backup Compression...(read more)

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  • What Would You Select?

    Software development is a collection of trade offs; performance for speed to market, quick & dirty vs. maintainable, on and on. Most tend to sacrifice user experience at some level for time to market, other do not consider maintainability, reliability....(read more)...Did you know that DotNetSlackers also publishes .net articles written by top known .net Authors? We already have over 80 articles in several categories including Silverlight. Take a look: here.

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  • Hierarchies in SQL, Part II, the Sequel

    In a followup to his first article on Hierarchies, Gus Gwynn takes a look at the performance of a few different methods of querying a hierarchy. Learn how the HierarchyID stacks up. Are you sure you can restore your backups? Run full restore + DBCC CHECKDB quickly and easily with SQL Backup Pro's new automated verification. Check for corruption and prepare for when disaster strikes. Try it now.

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  • Rendering Texture Quad to Screen or FBO (OpenGL ES)

    - by Usman.3D
    I need to render the texture on the iOS device's screen or a render-to-texture frame buffer object. But it does not show any texture. It's all black. (I am loading texture with image myself for testing purpose) //Load texture data UIImage *image=[UIImage imageNamed:@"textureImage.png"]; GLuint width = FRAME_WIDTH; GLuint height = FRAME_HEIGHT; //Create context void *imageData = malloc(height * width * 4); CGColorSpaceRef colorSpace = CGColorSpaceCreateDeviceRGB(); CGContextRef context = CGBitmapContextCreate(imageData, width, height, 8, 4 * width, colorSpace, kCGImageAlphaPremultipliedLast | kCGBitmapByteOrder32Big); CGColorSpaceRelease(colorSpace); //Prepare image CGContextClearRect(context, CGRectMake(0, 0, width, height)); CGContextDrawImage(context, CGRectMake(0, 0, width, height), image.CGImage); glGenTextures(1, &texture); glBindTexture(GL_TEXTURE_2D, texture); glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MIN_FILTER, GL_NEAREST); glTexImage2D(GL_TEXTURE_2D, 0, GL_RGBA, width, height, 0, GL_RGBA, GL_UNSIGNED_BYTE, imageData); glTexParameterf(GL_TEXTURE_2D, GL_TEXTURE_WRAP_S, GL_CLAMP_TO_EDGE); glTexParameterf(GL_TEXTURE_2D, GL_TEXTURE_WRAP_T, GL_CLAMP_TO_EDGE); Simple Texture Quad drawing code mentioned here //Bind Texture, Bind render-to-texture FBO and then draw the quad const float quadPositions[] = { 1.0, 1.0, 0.0, -1.0, 1.0, 0.0, -1.0, -1.0, 0.0, -1.0, -1.0, 0.0, 1.0, -1.0, 0.0, 1.0, 1.0, 0.0 }; const float quadTexcoords[] = { 1.0, 1.0, 0.0, 1.0, 0.0, 0.0, 0.0, 0.0, 1.0, 0.0, 1.0, 1.0 }; // stop using VBO glBindBuffer(GL_ARRAY_BUFFER, 0); // setup buffer offsets glVertexAttribPointer(ATTRIB_VERTEX, 3, GL_FLOAT, GL_FALSE, 3*sizeof(float), quadPositions); glVertexAttribPointer(ATTRIB_TEXCOORD0, 2, GL_FLOAT, GL_FALSE, 2*sizeof(float), quadTexcoords); // ensure the proper arrays are enabled glEnableVertexAttribArray(ATTRIB_VERTEX); glEnableVertexAttribArray(ATTRIB_TEXCOORD0); //Bind Texture and render-to-texture FBO. glBindTexture(GL_TEXTURE_2D, GLid); //Actually wanted to render it to render-to-texture FBO, but now testing directly on default FBO. //glBindFramebuffer(GL_FRAMEBUFFER, textureFBO[pixelBuffernum]); // draw glDrawArrays(GL_TRIANGLES, 0, 2*3); What am I doing wrong in this code? P.S. I'm not familiar with shaders yet, so it is difficult for me to make use of them right now.

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  • 12.04, and 13.10 slower than xp on Lenovo thinkpad R61e. Any bloatware to remove?

    - by Alex
    My mom's Laptop is running really slow with 12.04 and 13.10 right after installation. ubuntu claims it should run nice and smoothly for the hardware thats on it. Lenovo ThinkPad R61e: CPU - Pentium Dual Core t2370 1.73ghz x 2 Ram - 1GB DDR2 667mhz GPU - intel 965gm x86/mmx/sse2 HDD - 80gb sata i tried hardware tests and they fail right that the very beginning of the testing. it does the same for bootable hardware tests (on a cd or usb) Is there any bloatware that can be removed that common windows users would never use?

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  • Oracle University Partner Enablement Update (28th August)

    - by swalker
    Oracle University: Java Certification News The following exam has recently gone into Production: Exam Title (and code) Certification Track Java SE 7 Programmer II (1Z0-804) Oracle Certified Professional, Java SE 7 Programmer Full preparation details are available on the exam page, including prerequisites for this certification, exam topics and pricing. Remember: Your OPN discount is applied to the standard pricing shown on the website. Exams can be taken at an Oracle Test Center near you or at any Pearson VUE Testing Center. Stay Connected to Oracle University: LinkedIn OracleMix Twitter Facebook Google+

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  • Organization &amp; Architecture UNISA Studies &ndash; Chap 4

    - by MarkPearl
    Learning Outcomes Explain the characteristics of memory systems Describe the memory hierarchy Discuss cache memory principles Discuss issues relevant to cache design Describe the cache organization of the Pentium Computer Memory Systems There are key characteristics of memory… Location – internal or external Capacity – expressed in terms of bytes Unit of Transfer – the number of bits read out of or written into memory at a time Access Method – sequential, direct, random or associative From a users perspective the two most important characteristics of memory are… Capacity Performance – access time, memory cycle time, transfer rate The trade off for memory happens along three axis… Faster access time, greater cost per bit Greater capacity, smaller cost per bit Greater capacity, slower access time This leads to people using a tiered approach in their use of memory   As one goes down the hierarchy, the following occurs… Decreasing cost per bit Increasing capacity Increasing access time Decreasing frequency of access of the memory by the processor The use of two levels of memory to reduce average access time works in principle, but only if conditions 1 to 4 apply. A variety of technologies exist that allow us to accomplish this. Thus it is possible to organize data across the hierarchy such that the percentage of accesses to each successively lower level is substantially less than that of the level above. A portion of main memory can be used as a buffer to hold data temporarily that is to be read out to disk. This is sometimes referred to as a disk cache and improves performance in two ways… Disk writes are clustered. Instead of many small transfers of data, we have a few large transfers of data. This improves disk performance and minimizes processor involvement. Some data designed for write-out may be referenced by a program before the next dump to disk. In that case the data is retrieved rapidly from the software cache rather than slowly from disk. Cache Memory Principles Cache memory is substantially faster than main memory. A caching system works as follows.. When a processor attempts to read a word of memory, a check is made to see if this in in cache memory… If it is, the data is supplied, If it is not in the cache, a block of main memory, consisting of a fixed number of words is loaded to the cache. Because of the phenomenon of locality of references, when a block of data is fetched into the cache, it is likely that there will be future references to that same memory location or to other words in the block. Elements of Cache Design While there are a large number of cache implementations, there are a few basic design elements that serve to classify and differentiate cache architectures… Cache Addresses Cache Size Mapping Function Replacement Algorithm Write Policy Line Size Number of Caches Cache Addresses Almost all non-embedded processors support virtual memory. Virtual memory in essence allows a program to address memory from a logical point of view without needing to worry about the amount of physical memory available. When virtual addresses are used the designer may choose to place the cache between the MMU (memory management unit) and the processor or between the MMU and main memory. The disadvantage of virtual memory is that most virtual memory systems supply each application with the same virtual memory address space (each application sees virtual memory starting at memory address 0), which means the cache memory must be completely flushed with each application context switch or extra bits must be added to each line of the cache to identify which virtual address space the address refers to. Cache Size We would like the size of the cache to be small enough so that the overall average cost per bit is close to that of main memory alone and large enough so that the overall average access time is close to that of the cache alone. Also, larger caches are slightly slower than smaller ones. Mapping Function Because there are fewer cache lines than main memory blocks, an algorithm is needed for mapping main memory blocks into cache lines. The choice of mapping function dictates how the cache is organized. Three techniques can be used… Direct – simplest technique, maps each block of main memory into only one possible cache line Associative – Each main memory block to be loaded into any line of the cache Set Associative – exhibits the strengths of both the direct and associative approaches while reducing their disadvantages For detailed explanations of each approach – read the text book (page 148 – 154) Replacement Algorithm For associative and set associating mapping a replacement algorithm is needed to determine which of the existing blocks in the cache must be replaced by a new block. There are four common approaches… LRU (Least recently used) FIFO (First in first out) LFU (Least frequently used) Random selection Write Policy When a block resident in the cache is to be replaced, there are two cases to consider If no writes to that block have happened in the cache – discard it If a write has occurred, a process needs to be initiated where the changes in the cache are propagated back to the main memory. There are several approaches to achieve this including… Write Through – all writes to the cache are done to the main memory as well at the point of the change Write Back – when a block is replaced, all dirty bits are written back to main memory The problem is complicated when we have multiple caches, there are techniques to accommodate for this but I have not summarized them. Line Size When a block of data is retrieved and placed in the cache, not only the desired word but also some number of adjacent words are retrieved. As the block size increases from very small to larger sizes, the hit ratio will at first increase because of the principle of locality, which states that the data in the vicinity of a referenced word are likely to be referenced in the near future. As the block size increases, more useful data are brought into cache. The hit ratio will begin to decrease as the block becomes even bigger and the probability of using the newly fetched information becomes less than the probability of using the newly fetched information that has to be replaced. Two specific effects come into play… Larger blocks reduce the number of blocks that fit into a cache. Because each block fetch overwrites older cache contents, a small number of blocks results in data being overwritten shortly after they are fetched. As a block becomes larger, each additional word is farther from the requested word and therefore less likely to be needed in the near future. The relationship between block size and hit ratio is complex, and no set approach is judged to be the best in all circumstances.   Pentium 4 and ARM cache organizations The processor core consists of four major components: Fetch/decode unit – fetches program instruction in order from the L2 cache, decodes these into a series of micro-operations, and stores the results in the L2 instruction cache Out-of-order execution logic – Schedules execution of the micro-operations subject to data dependencies and resource availability – thus micro-operations may be scheduled for execution in a different order than they were fetched from the instruction stream. As time permits, this unit schedules speculative execution of micro-operations that may be required in the future Execution units – These units execute micro-operations, fetching the required data from the L1 data cache and temporarily storing results in registers Memory subsystem – This unit includes the L2 and L3 caches and the system bus, which is used to access main memory when the L1 and L2 caches have a cache miss and to access the system I/O resources

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  • The DevTouch Pro: New Mobile Application Development Tool Saves Developers and Managers Time and Money

    Montreal – 1 December 2010 – Amyuni Technologies, a leading vendor of high-performance development tools announced today the release of the DevTouch Pro, a revolutionary software deployment tool designed for mobile application developers. The DevTouch Pro is a color touchscreen tablet designed to provide mobile application developers and product managers with a customizable development, testing, and deployment platform.

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  • Software emulated OpenGL with higher version than my graphics card supports

    - by leemes
    I have an Intel GMA 950 chipset in my netbook. I want to learn how to write OpenGL shader programs with this fantastic tutorial and therefore need OpenGL 3.3. Sadly, my graphics card only supports OpenGL 1.4. I think that MESA can emulate OpenGL in software, so I'm wondering if it can emulate OpenGL 3.3 without any hardware accelleration (performance is very much no problem, since this is only for learning and testing puroses). Is there any possibility to do this?

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  • Leveraging a hosted web font service from a local development server?

    - by Tom Auger
    There are a number of popular web font services on the market today who "host" the fonts and serve them to your web page via javascript or CSS pointing to remote locations. For example http://webfonts.fonts.com or http://typekit.com However, there seems to be an issue when you're developing on a local testing server - the remote font services don't validate the font and return 403 access denied errors and the like. What workarounds are there for using remote services such as a hosted font service, on a local development server?

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