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  • Delphi developer switching to C#

    - by Dorin Duminica
    Hello, I'm a Delphiholic for quite some time now and lately I was thinking of learning some C# as well, however I'm kinda' "afraid of the unknown", I've done some simple apps as a test drive for C# and I have to admit that I've liked it, HOWEVER I do not really like the IDE... that being said here's the question that I would appreciate if others who went down this path would answer: As a Delphi developer what are the "main basic" changes from the Delphi language(by basic I mean basic -- utility functions, streams, etc.), I'm used to add "System, Classes, Windows" to uses not "use System.XXX.YYY.ZZZ", I'm trying to make a partial equality in my mind from Delphi to C# until I can see where does Delphi go hand-in-hand with C# and so on... I hope the question is pretty clear, if not, do not hesitate to swear me and I'll try to clarify as well as I can :-)

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  • iPhone Developer account with someone elses credit card

    - by HappYCrappY
    Hi I wanted to enroll in Apples iPhone developer program the problem is I myself don't own a credit card is it Ok if I use some one else's credit card to sign up... I mean will Apple pay the guy whose credit card I have used or can I specify my Account details for any future transactions & just use this credit card for paying Apple. (& yes I cannot get a credit card, I am currently jobless never ever had a credit card before in my life & credit card companies are very skeptical to give me one.) Thank you

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  • Examples of iphone developer programs

    - by yakub_moriss
    Hi,All I want to know the validity of the Enterprise iPhone developer program. is it also one year only ? And tell me the examples of both the iPhone development programs. 1)Standard Program and 2)Enterprise Program ==is Enterprise program == Intranet App -using which we can provide limited access within the company employees ==and Standard program == Internet App -using which we can provide the access to all iphone users worldwide using iTunes. am i correct or not ? please correct me if i am wrong... Thanking you...

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  • Developer salaries to rise?

    - by rmbarnes
    I have heard people say that the large fall in people graduating with CS based degrees will soon cause developer salaries to rise due to the effects of a smaller supply but ever increasing demand. Do people really think that this is true? To my mind there are a couple of reasons this won't happen: Outsourcing With 'DIY' style languages like PHP and the attitudes of many of the communities behind these languages becoming ever more popular (e.g. the learn yourself, don't need to go to university way of thinking) not many employers will care if developers have degrees in CS or not.

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  • Linux e1000e (Intel networking driver) problems galore, where do I start?

    - by Evan Carroll
    I'm currently having a major problem with e1000e (not working at all) in Ubuntu Maverick (1.0.2-k4), after resume I'm getting a lot of stuff in dmesg: [ 9085.820197] e1000e 0000:02:00.0: PCI INT A disabled [ 9089.907756] e1000e: Intel(R) PRO/1000 Network Driver - 1.0.2-k4 [ 9089.907762] e1000e: Copyright (c) 1999 - 2009 Intel Corporation. [ 9089.907797] e1000e 0000:02:00.0: Disabling ASPM L1 [ 9089.907827] e1000e 0000:02:00.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16 [ 9089.907857] e1000e 0000:02:00.0: setting latency timer to 64 [ 9089.908529] e1000e 0000:02:00.0: irq 44 for MSI/MSI-X [ 9089.908922] e1000e 0000:02:00.0: Disabling ASPM L0s [ 9089.908954] e1000e 0000:02:00.0: (unregistered net_device): PHY reset is blocked due to SOL/IDER session. [ 9090.024625] e1000e 0000:02:00.0: eth0: (PCI Express:2.5GB/s:Width x1) 00:0a:e4:3e:ce:74 [ 9090.024630] e1000e 0000:02:00.0: eth0: Intel(R) PRO/1000 Network Connection [ 9090.024712] e1000e 0000:02:00.0: eth0: MAC: 2, PHY: 2, PBA No: 005302-003 [ 9090.109492] e1000e 0000:02:00.0: irq 44 for MSI/MSI-X [ 9090.164219] e1000e 0000:02:00.0: irq 44 for MSI/MSI-X and, a bunch of [ 2128.005447] e1000e 0000:02:00.0: eth0: Detected Hardware Unit Hang: [ 2128.005452] TDH <89> [ 2128.005454] TDT <27> [ 2128.005456] next_to_use <27> [ 2128.005458] next_to_clean <88> [ 2128.005460] buffer_info[next_to_clean]: [ 2128.005463] time_stamp <6e608> [ 2128.005465] next_to_watch <8a> [ 2128.005467] jiffies <6f929> [ 2128.005469] next_to_watch.status <0> [ 2128.005471] MAC Status <80080703> [ 2128.005473] PHY Status <796d> [ 2128.005475] PHY 1000BASE-T Status <4000> [ 2128.005477] PHY Extended Status <3000> [ 2128.005480] PCI Status <10> I decided to compile the latest stable e1000e to 1.2.17, now I'm getting: [ 9895.678050] e1000e: Intel(R) PRO/1000 Network Driver - 1.2.17-NAPI [ 9895.678055] e1000e: Copyright(c) 1999 - 2010 Intel Corporation. [ 9895.678098] e1000e 0000:02:00.0: Disabling ASPM L1 [ 9895.678129] e1000e 0000:02:00.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16 [ 9895.678162] e1000e 0000:02:00.0: setting latency timer to 64 [ 9895.679136] e1000e 0000:02:00.0: irq 44 for MSI/MSI-X [ 9895.679160] e1000e 0000:02:00.0: Disabling ASPM L0s [ 9895.679192] e1000e 0000:02:00.0: (unregistered net_device): PHY reset is blocked due to SOL/IDER session. [ 9895.791758] e1000e 0000:02:00.0: eth0: (PCI Express:2.5GB/s:Width x1) 00:0a:e4:3e:ce:74 [ 9895.791766] e1000e 0000:02:00.0: eth0: Intel(R) PRO/1000 Network Connection [ 9895.791850] e1000e 0000:02:00.0: eth0: MAC: 3, PHY: 2, PBA No: 005302-003 [ 9895.892464] e1000e 0000:02:00.0: irq 44 for MSI/MSI-X [ 9895.948175] e1000e 0000:02:00.0: irq 44 for MSI/MSI-X [ 9895.949111] ADDRCONF(NETDEV_UP): eth0: link is not ready [ 9895.954694] e1000e: eth0 NIC Link is Up 10 Mbps Full Duplex, Flow Control: RX/TX [ 9895.954703] e1000e 0000:02:00.0: eth0: 10/100 speed: disabling TSO [ 9895.955157] ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready [ 9906.832056] eth0: no IPv6 routers present With 1.2.20 I get: [ 9711.525465] e1000e: Intel(R) PRO/1000 Network Driver - 1.2.20-NAPI [ 9711.525472] e1000e: Copyright(c) 1999 - 2010 Intel Corporation. [ 9711.525521] e1000e 0000:02:00.0: Disabling ASPM L1 [ 9711.525554] e1000e 0000:02:00.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16 [ 9711.525586] e1000e 0000:02:00.0: setting latency timer to 64 [ 9711.526460] e1000e 0000:02:00.0: irq 45 for MSI/MSI-X [ 9711.526487] e1000e 0000:02:00.0: Disabling ASPM L0s [ 9711.526523] e1000e 0000:02:00.0: (unregistered net_device): PHY reset is blocked due to SOL/IDER session. [ 9711.639763] e1000e 0000:02:00.0: eth0: (PCI Express:2.5GB/s:Width x1) 00:0a:e4:3e:ce:74 [ 9711.639771] e1000e 0000:02:00.0: eth0: Intel(R) PRO/1000 Network Connection [ 9711.639854] e1000e 0000:02:00.0: eth0: MAC: 3, PHY: 2, PBA No: 005302-003 [ 9712.060770] e1000e 0000:02:00.0: irq 45 for MSI/MSI-X [ 9712.116195] e1000e 0000:02:00.0: irq 45 for MSI/MSI-X [ 9712.117098] ADDRCONF(NETDEV_UP): eth0: link is not ready [ 9712.122684] e1000e: eth0 NIC Link is Up 100 Mbps Full Duplex, Flow Control: RX/TX [ 9712.122693] e1000e 0000:02:00.0: eth0: 10/100 speed: disabling TSO [ 9712.123142] ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready [ 9722.920014] eth0: no IPv6 routers present But, I'm still getting these [ 9982.992851] PCI Status <10> [ 9984.993602] e1000e 0000:02:00.0: eth0: Detected Hardware Unit Hang: [ 9984.993606] TDH <5d> [ 9984.993608] TDT <6b> [ 9984.993611] next_to_use <6b> [ 9984.993613] next_to_clean <5b> [ 9984.993615] buffer_info[next_to_clean]: [ 9984.993617] time_stamp <24da80> [ 9984.993619] next_to_watch <5d> [ 9984.993621] jiffies <24f200> [ 9984.993624] next_to_watch.status <0> [ 9984.993626] MAC Status <80080703> [ 9984.993628] PHY Status <796d> [ 9984.993630] PHY 1000BASE-T Status <4000> [ 9984.993632] PHY Extended Status <3000> [ 9984.993635] PCI Status <10> [ 9986.001047] e1000e 0000:02:00.0: eth0: Reset adapter [ 9986.176202] e1000e: eth0 NIC Link is Up 10 Mbps Full Duplex, Flow Control: RX/TX [ 9986.176211] e1000e 0000:02:00.0: eth0: 10/100 speed: disabling TSO I'm not sure where to start troubleshooting this. Any ideas? Here is the result of ethtool -d eth0 MAC Registers ------------- 0x00000: CTRL (Device control register) 0x18100248 Endian mode (buffers): little Link reset: reset Set link up: 1 Invert Loss-Of-Signal: no Receive flow control: enabled Transmit flow control: enabled VLAN mode: disabled Auto speed detect: disabled Speed select: 1000Mb/s Force speed: no Force duplex: no 0x00008: STATUS (Device status register) 0x80080703 Duplex: full Link up: link config TBI mode: disabled Link speed: 10Mb/s Bus type: PCI Express Port number: 0 0x00100: RCTL (Receive control register) 0x04048002 Receiver: enabled Store bad packets: disabled Unicast promiscuous: disabled Multicast promiscuous: disabled Long packet: disabled Descriptor minimum threshold size: 1/2 Broadcast accept mode: accept VLAN filter: enabled Canonical form indicator: disabled Discard pause frames: filtered Pass MAC control frames: don't pass Receive buffer size: 2048 0x02808: RDLEN (Receive desc length) 0x00001000 0x02810: RDH (Receive desc head) 0x00000001 0x02818: RDT (Receive desc tail) 0x000000F0 0x02820: RDTR (Receive delay timer) 0x00000000 0x00400: TCTL (Transmit ctrl register) 0x3103F0FA Transmitter: enabled Pad short packets: enabled Software XOFF Transmission: disabled Re-transmit on late collision: enabled 0x03808: TDLEN (Transmit desc length) 0x00001000 0x03810: TDH (Transmit desc head) 0x00000000 0x03818: TDT (Transmit desc tail) 0x00000000 0x03820: TIDV (Transmit delay timer) 0x00000008 PHY type: IGP2 and ethtool -c eth0 Coalesce parameters for eth0: Adaptive RX: off TX: off stats-block-usecs: 0 sample-interval: 0 pkt-rate-low: 0 pkt-rate-high: 0 rx-usecs: 3 rx-frames: 0 rx-usecs-irq: 0 rx-frames-irq: 0 tx-usecs: 0 tx-frames: 0 tx-usecs-irq: 0 tx-frames-irq: 0 rx-usecs-low: 0 rx-frame-low: 0 tx-usecs-low: 0 tx-frame-low: 0 rx-usecs-high: 0 rx-frame-high: 0 tx-usecs-high: 0 tx-frame-high: 0 Here is also the lspci -vvv for this controller 02:00.0 Ethernet controller: Intel Corporation 82573L Gigabit Ethernet Controller Subsystem: Lenovo ThinkPad X60s Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Interrupt: pin A routed to IRQ 45 Region 0: Memory at ee000000 (32-bit, non-prefetchable) [size=128K] Region 2: I/O ports at 2000 [size=32] Capabilities: [c8] Power Management version 2 Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=1 PME- Capabilities: [d0] MSI: Enable+ Count=1/1 Maskable- 64bit+ Address: 00000000fee0300c Data: 415a Capabilities: [e0] Express (v1) Endpoint, MSI 00 DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <512ns, L1 <64us ExtTag- AttnBtn- AttnInd- PwrInd- RBE- FLReset- DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+ RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ MaxPayload 128 bytes, MaxReadReq 512 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <128ns, L1 <64us ClockPM+ Surprise- LLActRep- BwNot- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+ ExtSynch- ClockPM+ AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- Capabilities: [100 v1] Advanced Error Reporting UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq+ ACSViol- UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- UESvrt: DLP+ SDES- TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol- CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr- CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr- AERCap: First Error Pointer: 14, GenCap- CGenEn- ChkCap- ChkEn- Capabilities: [140 v1] Device Serial Number 00-0a-e4-ff-ff-3e-ce-74 Kernel driver in use: e1000e Kernel modules: e1000e I filed a bug on this upstream, still no idea how to get more useful information. Here is a the result of the running that script EEPROM FIX UPDATE $ sudo bash fixeep-82573-dspd.sh eth0 eth0: is a "82573L Gigabit Ethernet Controller" This fixup is applicable to your hardware Your eeprom is up to date, no changes were made Do I still need to do anything? Also here is my EEPROM dump $ sudo ethtool -e eth0 Offset Values ------ ------ 0x0000 00 0a e4 3e ce 74 30 0b b2 ff 51 00 ff ff ff ff 0x0010 53 00 03 02 6b 02 7e 20 aa 17 9a 10 86 80 df 80 0x0020 00 00 00 20 54 7e 00 00 14 00 da 00 04 00 00 27 0x0030 c9 6c 50 31 3e 07 0b 04 8b 29 00 00 00 f0 02 0f 0x0040 08 10 00 00 04 0f ff 7f 01 4d ff ff ff ff ff ff 0x0050 14 00 1d 00 14 00 1d 00 af aa 1e 00 00 00 1d 00 0x0060 00 01 00 40 1f 12 07 40 ff ff ff ff ff ff ff ff 0x0070 ff ff ff ff ff ff ff ff ff ff ff ff ff ff 4a e0 I'd also like to note that I used eth0 every day for years and until recently never had an issue.

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  • How one does qualify as a Web UI Developer?

    - by Duralumin
    I have about 20 years of experience with programming, most of that on the job, and right now, I define myself as a Web Developer, because I think about half my expertise lies in the all too extended "web" field, both server side and client side, and because in the last years I'm mostly doing web development. I know my javascript, jQuery, jQueryUI, HTML4-5, css2-3 and some frameworks like backbone.js and angularJS Since university I've always been interested in Man-Machine Interaction, UI and UX. Recently, I saw the label "Web UI Developer" tossed around, and I thought that would be something I would like to qualify for. And I'd really like to qualify with confidence. I didn't find any certificate or similar, and I don't think there are any. Is the only way to qualify as a Web UI Developer having a job as one? What are the skills I need to have, and the resources I can use to acquire them?

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  • L'Internet en 3D arrivera d'ici 5 ans d'après Intel, est-ce le futur du web ?

    L'Internet en 3D arrivera d'ici 5 ans d'après Intel, est-ce le futur du web ? Sean Koehl travaille chez Intel en tant que "techno évangéliste". Il s'est réccemment exprimé au sujet du futur d'Internet, et il estime que le réseau "sera complètement différent d'ici 5 à 10 ans". Selon lui, notre manière d'interagir entre nous, et avec des appareils électroniques, va changer. Radicalement. Ainsi, il prédit l'émergence d'une technologie tri-dimensionnelle très réaliste dans 5 ans. Comme de plus en plus de gens autour du monde s'équipent avec des ordinateurs ou des smartphones et ont un accès à l'Internet. Sean explique qu'on commence seulement à exploiter toute cette puissance informatiq...

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  • Intel dévoile un PC avec un processeur à 48 coeurs, les fondeurs se rendent coup pour coup dans la c

    Mise à jour du 09/04/10 Intel dévoile un PC avec un processeur à 48 coeurs Les fondeurs se rendent coup pour coup dans la course au multi-coeur Après le prototype pour serveur, la mise en application en desktop. Sean Koehl, "techno évangéliste" de l'Intel Labs, vient de dévoiler un ordinateur particulièrement performant puisque celui-ci embarque un processeur à... 48 coeurs ! (lire ci-avant) Arrêtons le suspens, le grand public n'est pas visé (en tout cas pas tout de suite). Les premiers exemplaires de ces machines seront livrés vers mi-2010 à des institutions spécialisées dans la recherche. Sean Koehl note né...

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  • Junior software developer - How to understand web applications in depth?

    - by nat_gr
    I am currently a junior developer in web applications and specifically in ASP.NET MVC technology. My problem is that the C# senior developer in the company has no experience with this technology and I try to learn without any guidance. I went through all tutorials (e.g music store), codeplex projects and also read Pro ASP.NET MVC 4. However, most of the examples are about CRUD and e-commerce applications. What I don't understand is how dependency injection fits in web applications (I have realized that is not only used for facilitating unit testing) or when I should use a custom model binder or how to model the business logic when there is already a database schema in place. I read the forum quite often and it would very helpful if some experienced developer could give me an insight about how to proceed. Do I need to read some books to understand the overall idea behind web applications? And what kind of application should I start building myself - I don't think it would be useful to create similar examples with the tutorials.

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  • I need to know the reasons why learning Linux Shell Scripting (BASH) benefits me as a PHP developer

    - by Ahmad Farouk
    I have been developing web sites/applications using the LAMP stack for almost 5 years. Currently I am interested to dig more into Linux OS, specifically BASH but from a web developer perspective, not from sys admin perspective. I am not intending to administrate Linux Servers. Only, I want to know, does learning shell scripting benefit me as a PHP developer? Does it make me a better, more skilled developer, or just its something irrelevant? Reasons, and examples are highly appreciated. Thanks in advance.

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  • runt integrated intel graphics card + nvidia pcie graphics card?

    - by Roberto
    Its days I am searching for information/help. Is this possible at all? I am running Ubuntu 11.10 on an intel core i3 530 on a intel dh55hc mainboard. I have 2 monitors attached, one on dvi and one on hdmi. I want to ad a third or eaven a fourth monitor using an additional graphics card nvidia in pcie slot. I cant get an image on all monitors at the same time. I am wondering if this is possible at all? Any ideas where I can get information about this? Thanks in advance Roberto

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  • How is a "Software Developer" different from a "Software Consultant"? What makes a consultant?

    - by Kumar
    I have seen a lot of people claiming themselves to be a "software consultant". These consultants do what a normal software developer does, write code, estimate tasks, fix bugs and attend meetings etc. The only difference being the financials, consultants end up earning more. Then how is a software developer different from a "consultant"? In addition to the main question, I would like to know how can a software developer become a consultant? Are there any specific guidelines for a consultant? Do they need to amass certifications and write up research papers? Please do not confuse the software consultant with a management consultant. Software consultants I have seen are not managers.

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  • Windows 8 ne serait pas encore finalisé pour le patron d'Intel, qui estime que des améliorations sont encore nécessaires

    Windows 8 ne serait pas encore finalisé pour le patron d'Intel qui estime que des améliorations sont encore nécessaires Microsoft va officiellement lancer Windows 8 le 26 octobre avec une nouvelle génération de tablettes et PC fonctionnant sous le système d'exploitation. Mais, il semblerait que l'OS ne soit pas encore totalement finalisé. C'est en tout cas ce que pense Paul Otellini, le PDG d'Intel, selon un article Bloomberg. Le patron du constructeur de microprocesseurs qui est le partenaire le plus proche de Microsoft aurait déclaré lors d'une réunion privée avec son équipe de Taïwan que Windows 8 va être lancé avant d'être finalisé. D'un point de vu comm...

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  • Intel présente ses puces Sandy Bridge, axées sur l'overclocking, la protection de contenus et le contrôle graphique

    Intel présente ses puces Sandy Bridge, axées sur l'overclocking, la protection de contenus et le contrôle graphique Mise à jour du 04.01.2011 par Katleen C'est officiel, Intel va enfin dévoiler ses puces Sandy Bridge tant attendues, et dans les temps annoncés qui plus est. Les produits, qui viennent d'être lancés, seront présentés cette semaine lors du CES de Las Vegas. La gamme Sandy Bridge se compose de 4 Core i3, 12 Core i5 et 13 Core i7 dont 1 qualifié d'Extreme. Comme nous vous l'annoncions en septembre, ces processeurs seront gravés en 32nm et seront optimisés pour un usage dans les ordinateurs portables (laptops, netbooks, etc.), pour des fréquences de 2,2 GHz (po...

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  • AMD : des puces à trois et quatre coeurs pour PC portables et une baisse des prix pour contrer Intel

    Mise à jour du 12/05/10 AMD : des puces à trois et quatre coeurs pour portables Et une baisse des prix pour contrer Intel AMD vient de dévoiler des puces triple-coeurs et quadri-coeurs spécialement destinés au marché des Notebooks. Ces puces Phenom II tourneront à une vitesse allant entre 1.6GHz et 2.3GHz. Elles visent bien évidemment à essayer de contrer la concurrence de plus en plus virulente d'Intel qui devrait, de son coté, lancer une gamme de puces entre ses Atoms (pour Netbooks) et ses Core i5/i3 (pour desktop) spécialement conçues pour ce marché des portables hybrides. Rappelons que les Notebooks ...

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  • Which drivers do I need for Ethernet and CAN bus on Intel Tolapai?

    - by Hanno Fietz
    I've installed 10.04 Server on an embedded machine (NISE 110 by Nexcom) and the builtin Ethernet and CAN-bus controllers don't work out of the box. The controller seems to be an Intel EP80579 chipset for both, according to lspci. I tried Intel's product website, where they seem to have FreeBSD drivers only. There's also drivers for RedHat, but I'm struggling with the manual build required to get them to work. Googling so far didn't get me anywhere. Which drivers do I need, and where do I get them?

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  • Les premières puces Sandy Bridge corrigées ont été livrées, la rapidité d'Intel rassure les constructeurs de cartes mère

    Les premières puces Sandy Bridge corrigées ont été livrées, la rapidité d'Intel rassure les constructeurs de cartes mère Mise à jour du 21.02.2011 par Katleen Intel semble avoir tenu ses engagements, à savoir livrer ses nouveau chipset (en remplacement des défectueux) à la fin février. Le second mois de l'année touche à sa fin et les premières puces de ce type viendraient d'être livrées. Le constructeur MSI a en effet déclaré en avoir reçu la première fournée, et s'atteler dès à présente à la réparation et au remplacement des cartes mères défectueuses concernées par le rappel. Les composants ainsi mis à jour porteront une étiquette indiquant "MSI B3 Stepping Ready...

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  • Intel dément trouver Windows 8 pas assez finalisé, l'OS serait même l'une des meilleures choses qui soient arrivées à la société

    Windows 8 ne serait pas encore finalisé pour le patron d'Intel qui estime que des améliorations sont encore nécessaires Microsoft va officiellement lancer Windows 8 le 26 octobre avec une nouvelle génération de tablettes et PC fonctionnant sous le système d'exploitation. Mais, il semblerait que l'OS ne soit pas encore totalement finalisé. C'est en tout cas ce que pense Paul Otellini, le PDG d'Intel, selon un article Bloomberg. Le patron du constructeur de microprocesseurs qui est le partenaire le plus proche de Microsoft aurait déclaré lors d'une réunion privée avec son équipe de Taïwan que Windows 8 va être lancé avant d'être finalisé. D'un point de vu comm...

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  • "Meilleur premier trimestre de tous les temps" pour Intel, AMD dans le vert : retour de la croissan

    Mise à jour du 26/01/10 "Meilleur premier trimestre de tous les temps" pour Intel AMD repasse dans le vert dans un contexte favorable : des résultats qui annoncent le fin de la crise ou simple trompe-l'oeil ? Intel vient d'annoncer un résultat trimestriel record, "le meilleur premier trimestre de tous les temps" (en vo : "best first quarter ever") pour la société. Avec un bénéfice net de 2,4 milliards pour un chiffre d'affaires de plus de 10 milliards, le résultat de ce premier trimestre est en progression de plus de 280 % par rapport à la même période de 2009. Les lancements des modèles Co...

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  • Intel annonce une puce pour serveurs composée de 32 coeurs, faisant partie de sa future gamme de pro

    Mise à jour du 02.06.2010 par Katleen Intel annonce une puce pour serveurs composée de 32 coeurs, faisant partie de sa future gamme de produits Knights Intel vient d'annoncer une puce pour serveurs composée de 32 coeurs, cadencés à 1.2 GHz, élaborée sur une architecture mêlant des coeurs x86 ainsi que d'autres spécialisés pour répondre aux besoins spécifiques des serveurs à haute performance. Répondant au nom de Knights Ferry, ce processeur est "le plus rapide pouvant traiter plus de 500 Gigaflops de données", d'après son constructeur. Il marque les premiers pas d'une gamme destinée aux serveurs (Knights), qui repose sur une architecture MIC (Many Integrated Cores). Les proce...

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  • Boost binding a function taking a reference

    - by Jamie Cook
    Hi all, I am having problems compiling the following snippet int temp; vector<int> origins; vector<string> originTokens = OTUtils::tokenize(buffer, ","); // buffer is a char[] array // original loop BOOST_FOREACH(string s, originTokens) { from_string(temp, s); origins.push_back(temp); } // I'd like to use this to replace the above loop std::transform(originTokens.begin(), originTokens.end(), origins.begin(), boost::bind<int>(&FromString<int>, boost::ref(temp), _1)); where the function in question is // the third parameter should be one of std::hex, std::dec or std::oct template <class T> bool FromString(T& t, const std::string& s, std::ios_base& (*f)(std::ios_base&) = std::dec) { std::istringstream iss(s); return !(iss >> f >> t).fail(); } the error I get is 1>Compiling with Intel(R) C++ 11.0.074 [IA-32]... (Intel C++ Environment) 1>C:\projects\svn\bdk\Source\deps\boost_1_42_0\boost/bind/bind.hpp(303): internal error: assertion failed: copy_default_arg_expr: rout NULL, no error (shared/edgcpfe/il.c, line 13919) 1> 1> return unwrapper<F>::unwrap(f, 0)(a[base_type::a1_], a[base_type::a2_]); 1> ^ 1> 1>icl: error #10298: problem during post processing of parallel object compilation Google is being unusually unhelpful so I hope that some one here can provide some insights.

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  • Flushing writes in buffer of Memory Controller to DDR device

    - by Rohit
    At some point in my code, I need to push the writes in my code all the way to the DIMM or DDR device. My requirement is to ensure the write reaches the row,ban,column of the DDR device on the DIMM. I need to read what I've written to the main memory. I do not want caching to get me the value. Instead after writing I want to fetch this value from main memory(DIMM's). So far I've been using Intel's x86 instruction wbinvd(write back and invalidate cache). However this means the caches and TLB are flushed. Write-back requests go to the main memory. However, there is a reasonable amount of time this data might reside in the write buffer of the Memory Controller( Intel calls it integrated memory controller or IMC). The Memory Controller might take some more time depending on the algorithm that runs in the Memory Controller to handle writes. Is there a way I force all existing or pending writes in the write buffer of the memory controller to the DRAM devices ?? What I am looking for is something more direct and more low-level than wbinvd. If you could point me to right documents or specs that describe this I would be grateful. Generally, the IMC has a several registers which can be written or read from. From looking at the specs for that for the chipset I could not find anything useful. Thanks for taking the time to read this.

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  • Comparing developer productivity tools

    - by Jacob
    I am getting ready to test developer productivity tools for our team (Coderush, Resharper, JustCode, etc). We're planning to roll the tool out the same time as we deploy Visual Studio 2010 and TFS. I've seen several posts discussing the merits of one tool versus another. However, I haven't been able to find any discussion of a methodology self evaluating. One approach I've seen is to use each tool for a month or so and decide which one you like best. This seems completely reasonable if I were evaluating it for myself, but since I'm evaluating for others as well, I'd like to do something more rigorous. I'm hoping to collect some ideas on how to do that. As a starting point, my thinking was to come up a list of 10-20 crucial features to compare, then prepare a matrix where I can compare the relative strengths of each product. Once the matrix is complete, we can make a well informed decision about which product aligns with out needs. Since I'm not a user of any product now, it's been difficult to figure out which features are critical and which are less so. Thank you!

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  • Fastest Method to Learn Web Design for a Developer

    - by hekevintran
    I am a Web developer and in my projects I have noticed that my weakest point is not being good at the front-end design. Relying on other designers can be annoying if they are not able to produce as quickly as I want. My perspective on HTML/CSS is that it is basically a big hack that amazingly works. There are too many CSS and browser specific bugs/quirks to learn and remember them all without spending extreme amounts of time trying to untangle everything. Is there a fast track route to getting CSS into my brain? I have looked at some CSS books, but to me they really read as long lists of how to render things correctly in IE6 and how to make corners rounded. (Seriously why does it require so many tricks to make a sharp corner round? On any platform but the Web this would be called a major oversight.) Does there exist something that does the analogous to CSS that jQuery does for JavaScript? Using jQuery you don't need to know JavaScript well to make things that work. I am not interested in learning why IE6 does things in weird ways because I don't care about supporting it at all. I am more interested in a method of learning how to use CSS to do what I want without spending hours and hours reading obscure blogs.

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