Verilog linting tools?

Posted by mrflibble on Stack Overflow See other posts from Stack Overflow or by mrflibble
Published on 2011-01-30T15:20:41Z Indexed on 2011/01/30 15:25 UTC
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verilog

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lint

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typechecking

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hdl

What are your favorite linting tools for verilog?

I am currently looking for a good verilog linting tool. And preferably one that can be configured to either handle or ignore certain vendor specific primitives like LUT's, PLL's, etc.

I recently tried verilator-3.810, but out of the box it needs a little help with the primitives.

So what (linting) tools do you use to deal with the not-so-strict syntax of verilog?

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