Search Results

Search found 18 results on 1 pages for 'xilinx'.

Page 1/1 | 1 

• Compile OpenSSL from source using Xilinx EDK

  - by Asanka

  I want to use openSSL functions in my xilinx C++ project. So i downloaded the source and tried to compile using the makefile. But unfortunately the linux box I was provided did not contained the required software (perl5, make, etc) to compile the source using makefile. So as the second option i tried to compile the source as a shared library. So i…

  Read the article

• How to define clock input in Xilinx

  - by seventeen

  Hey, I have almost no experience with Xilinx. I have a group project for a Digital Logic course that is due soon, where my partner, who was supposed to take care of the Xilinx simulations decided to bail on me. So here I am trying to figure it out last minute. I have designed a synchronous counter using a few JK Flip Flops and I need to define the…

  Read the article

• Looking for library declaration of IP Module

  - by Martin

  Hi, I want to use the Xilinx hardware module of the ICAP controller in my own design. This module uses the following library: library hwicap_v5_00_a; use hwicap_v5_00_a.all; I was looking in the directories as well as subdirectories of Xilinx\12.1\ISE_DS\EDK\hw\XilinxProcessorIPLib\pcores but I could not find the package declaration of…

  Read the article

• Question regarding XST bitstream generation

  - by Richi

  Hi all, I have a very simple VHDL module, consisting of a few lines of code. The thing is, when I generate the bitstream, I end up with a huge bitstream. The reason for this is, I guess, that XST adds lots of extra information so that the bitstream can run standalone on a FPGA. However, for my purpose it would be interesting to see the…

  Read the article

• Verilog errors during synthesis

  - by chester.boo

  Here is the code in question: http://pastebin.com/smqUNpdt When I do a syntax check, everything is okay. But when I try to synthesize with XST I get the following errors: ERROR:Xst:870 - "fibonacci.v" line 42: Can not simplify operator DIV. ERROR:Xst:899 - "fibonacci.v" line 29: The logic for <out> does not match a known FF or…

  Read the article

• Verilog code simulates but does not run as predicted on FPGA

  - by chester.boo

  I did a behavioral simulation of my code, and it works perfectly. The results are as predicted. When I synthesize my code and upload it to a spartan 3e FPGA and try to analyze using chipscope, the results are not even close to what I would have expected. What have I done incorrectly? http://pastebin.com/XWMekL7r

  Read the article

• Modelsim (XE III/Starter 6.4b) not allowing me to define a macro function

  - by montooner

  I'm working on a Xiling FPGA for a course project. Normally we use the lab computers, but I'm trying to install on my own computer. So, I'm trying to include a macro file using line: `include "Const.v" But the following macro function doesn't work. Any ideas why? `ifdef synthesis // if Synplify `define SYNPLIFY …

  Read the article

• How do you run Xilinx91i in ubuntu?

  - by user187920

  I installed Xilinx91i on my comp under /usr/Xilinx91i/, but I don't know how to start it. Can someone help?

  Read the article

• kernel panic with exitcode=0x00000004 and no call trace

  - by litmusconfig

  A bit of background first - I'm trying to configure a MicroBlaze Linux (big-endian version) system on a Xilinx ML506 eval board. The goal is to use the second partition of a CompactFlash card attached to the Xilinx SystemACE controller. So far, root in initramfs works and after boot, I can mount and use said partition, no problem. But…

  Read the article

• Programming VHDL on Linux?

  - by ignatius

  Hello, Anyone knows good enviroment to program VHDL and simulate it (don't matter Xilinx or Altera) using Linux? Thanks Br

  Read the article

• How to generate `AllowDeactivateGrabs` in command line ?

  - by boffin

  I am using XFCE-Ubuntu and do a lot of my development work there. In my case, when I sometimes use Xilinx ISE, the mouse cursor hangs as a Grab pointer and then stops responding. The entire X environment becomes unusable and I have to kill it and restart. This is becoming a serious annoyance. I saw this bug: AllowDeactivateGrabs is…

  Read the article

• VHDL, using arithmetic & variables in "downto"?

  - by waitinforatrain

  Hey, Quick VHDL question, I don't have access to Xilinx at the moment due to dead laptop, so can't test this. I was wondering if it's possible to use variables and arithmetic in 'downto' statements, e.g: proc: process (x) begin y <= z(x downto 0) & z(7 downto x); end process; Thanks.

  Read the article

• Should you remove all warnings in your Verilog or VHDL design? Wh or why not?

  - by Brian Carlton

  In (regular) software I have worked at companies where the gcc option -Wall is used to show all warnings. Then they need to be dealt with. With non-trivial FPGA/ASIC design in Verilog or VHDL there are often many many warnings. Should I worry about all of them? Do you have any specific techniques to suggest? My flow is mainly for…

  Read the article

• Should you remove all warnings in your Verilog or VHDL design? Why or why not?

  - by Brian Carlton

  In (regular) software I have worked at companies where the gcc option -Wall is used to show all warnings. Then they need to be dealt with. With non-trivial FPGA/ASIC design in Verilog or VHDL there are often many many warnings. Should I worry about all of them? Do you have any specific techniques to suggest? My flow is mainly for…

  Read the article

• Running lmgrd on ubuntu 14.04 LTS

  - by SumanBhatR

  I have installed Xilinx 14.7 in ubuntu 14.04 LTS machine(i386 - 64bit). But I am unable to run lmgrd (for starting the license server). When I googled this problem, I found that lsb-core package needs to be installed. But the package is having many dependencies, I want to know how to install lsb-core package with all the necessary…

  Read the article

• Chroot into a 32 bit version of ubuntu from a 64 bit host

  - by Leif Andersen

  I have a piece of software that only runs on 32 bit linux (Xilinx webPack 10.1, apperently it 'has' to be the old version because that's the latest one compatible with their boards), anyway, this version is only compatible with 32 bit linux. So, I head off to this page to see what I can do:…

  Read the article

• Why is wget so much faster than Firefox at some downloads?

  - by Earlz

  Recently, I needed to do an update of Xilinx WebPack, mind you, this is one hefty piece of software. It weighs in at 6gigs, which definitely isn't "quick" on any internet I've ever had available to me. So, when I went to download it(using Firefox of course), I was very... unsettled by the…

  Read the article

• Multidimensional array problem in VHDL?

  - by Nektarios

  I'm trying to use a multidimensional array in VHDL and I'm having a lot of trouble getting it to work properly. My issue is that I've got an array of 17, of 16 vectors, of a given size. What I want to do is create 17 registers that are array of 16 * std_logic_vector of 32 bits (which = my…

  Read the article

1